Symbol-Rate Phase Detector for Multi-PAM Receiver
AssigneeRambus Inc.
InventorsMasum Hossain, Nhat Nguyen, Charles Walter Boecker
Life of this patent
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Abstract
A multi-PAM equalizer receives an input signal distorted by inter-symbol interference (ISI) and expressing a series of symbols each representing one of four pulse amplitudes to convey two binary bits of data per symbol. High-order circuitry resolves the most-significant bit (MSB) of each two-bit symbol, whereas low-order circuitry 115 resolves the immediate least-significant bit (LSB). The MSB is used without the LSB for timing recovery and to calculate tap values for both MSB and LSB evaluation.
Claims19
A multi-PAM receiver comprising:
- an input node to receive an input signal expressing a series of symbols, including an immediate symbol representing an analog immediate-symbol value and a prior symbol representing an analog prior-symbol value, each value representing multiple bits, including a most-significant bit (MSB) and a least-significant bit (LSB);
- a multi-PAM equalizer coupled to the input node, the multi-PAM equalizer to issue an immediate MSB decision and an immediate LSB decision responsive to the immediate-symbol value and a prior MSB decision and a prior LSB decision responsive to the prior-symbol value;
- and
- a phase detector to issue a phase-error signal responsive to the analog immediate-symbol value, the analog prior-symbol value, the immediate MSB decision, and the prior MSB decision.
A symbol-rate phase detector to output an error signal, the phase detector comprising:
- an input node to receive an input signal expressing a series of symbols, including an immediate symbol representing an analog immediate-symbol value and a prior symbol representing an analog prior-symbol value, each value representing multiple bits, including a most-significant bit (MSB) and a least-significant bit (LSB);
- a first arithmetic element to take a sum of the analog immediate-symbol value and the analog prior-symbol value;
- a second arithmetic element to take a difference between the analog immediate-symbol value and the analog prior-symbol value;
- and
- a multiplexer to select the error signal from between the sum and the difference responsive to the MSB of the immediate symbol and the MSB of the prior symbol.
A method for resolving an input signal expressing a series of symbols, each of the symbols expressed over a symbol time and representing a symbol value having a high-order bit and a low-order bit, the series of symbols including an immediate symbol representing an immediate-symbol value and a prior symbol representing a prior-symbol value, the method comprising:
- sampling an analog immediate-symbol value from the immediate symbol;
- sampling an analog prior-symbol value from the prior symbol;
- taking a sum and a difference from the immediate-symbol value and the prior-symbol value;
- and
- selecting one of the sum and the difference responsive to the high-order bit of the immediate symbol.
Dependencies are inferred from the claim text.