Method and system for an asynchronous successive approximation register analog-to-digital converter with word completion algorithm

A system for communication, the system comprising:

• a successive approximation register analog-to-digital converter (SAR ADC) comprising a plurality of switched capacitors, a comparator, a metastability detector comprising a timer having a tunable time interval, and a successive approximation register, said SAR DAC being operable to:
• sample input signals at inputs of the plurality of switched capacitors;
• compare, by the comparator, signals at outputs of the plurality of switched capacitors;
• sense whether a metastability condition exists for the comparator using the timer and set a metastability flag upon each metastability detection for each bit to be evaluated;
• increase a value of the tunable time interval, if more than one metastability flag is set during conversion of a sampled input signal;
• decrease a value of the tunable time interval, if no metastability flags are set;
• use the metastability flags for a word completion in cases when not all bits have been evaluated;
• and
• configure an output value of the SAR ADC based on a final value of the successive approximation register and word completion.

A system for communication, the system comprising:

• a successive approximation register analog-to-digital converter (SAR ADC) comprising a plurality of switched capacitors, a comparator, a metastability detector comprising a timer having a tunable time interval, a word completion block, and a successive approximation register, said SAR DAC being operable to:
• sample input signals at inputs of the plurality of switched capacitors;
• compare signals at outputs of the plurality of switched capacitors;
• sense whether a metastability condition exists for the comparator using the timer and set a metastability flag upon each metastability detection for each bit to be evaluated;
• increase a value of the tunable time interval, if more than one metastability flag is set during conversion of a sampled input signal;
• decrease a value of the tunable time interval, if no metastability flags are set;
• use the metastability flags for a word completion in cases when not all bits have been evaluated;
• and
• configure an output value of the SAR ADC based on a final value of the successive approximation register and word completion.