Spectrally efficient digital logic (sedl) digital to analog converter (dac)

A method of converting a digital signal into an analog signal, the method comprising:

• receiving an input signal having at least one spectrally-efficient digital logic (SEDL) pulse, a logic state of the at least one spectrally-efficient shaped pulse is provided by an integration of the input signal by an integration circuit configured to determine a logic state represented by each of a plurality of SEDL pulses of the input signal;
• receiving the determined logic state at a first pulse generator;
• and
• providing a scaled output signal having a spectrally-efficient shape at an output of the first pulse generator.

A digital-to-analog converter (DAC) circuit comprising:

• an integrator circuit configured to determine a logic state of at least three bits of an input signal, the input signal having a plurality of spectrally-efficient shaped pulses;
• a first clocked comparator circuit configured to receive the logic state of at least a first input pulse of the input signal;
• a first pulse generator having an input coupled to the output of the integrator circuit and configured to receive a logic state and generate, together with the first clocked comparator, a first scaled spectrally-efficient pulse;
• a second clocked comparator circuit configured to receive the logic state of at least a second input pulse of the input signal;
• a second pulse generator having an input coupled to the output of the integrator circuit and configured to receive a logic state and generate, together with the second clocked comparator, a second scaled spectrally-efficient pulse;
• a third clocked comparator circuit configured to receive the logic state of at least a third input pulse of the input signal;
• a third pulse generator having an input coupled to the output of the integrator circuit and configured to receive the logic state and generate, together with the third clocked comparator, a third scaled spectrally-efficient pulse;
• and
• a spectrally-efficient circuit coupled to the output of the first, second and third pulse generators, configured to combine the output of the first, second, and third pulse generators to determine an analog value to which the three input pulses correspond.