Junction gate field-effect transistor (jfet) having source/drain and gate isolation regions
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChia-Chung Chen, Chi-Feng Huang, Victor Chiang Liang
Life of this patent
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Abstract
A junction gate field-effect transistor (JFET) includes a substrate, a source region formed in the substrate, a drain region formed in the substrate, a channel region formed in the substrate, and at least one gate region formed in the substrate. The channel region connects the source and drain regions. The at least one gate region contacts one of the source and drain regions at an interface, and the at least one gate region is isolated from the other of the source and drain regions. A dielectric layer covers the interface while exposing portions of the gate region and the one of the source and drain regions.
Claims20
A junction gate field-effect transistor (JFET), comprising:
- a substrate;
- a first source/drain region disposed in the substrate;
- a second source/drain region disposed in the substrate;
- a channel region disposed in the substrate, the channel region connecting the first source/drain region and the second source/drain region;
- a gate region disposed in the substrate, the gate region contacting the first source/drain region at a first interface, the gate region isolated from the second source/drain region by an isolation region;
- and
- a dielectric layer covering the first interface while exposing a portion of the gate region and a portion the first source/drain region.
A device comprising:
- a first source/drain region in a semiconductor substrate;
- a gate in the semiconductor substrate surrounding the first source/drain region, the gate forming a first interface with the first source/drain region;
- an isolation region surrounding the gate;
- a second source/drain region surrounding the isolation region;
- a channel region under the isolation region and connecting the first source/drain region to the second source drain region;
- and
- a first dielectric layer extending across the first interface between the gate and the first source/drain region.
A semiconductor device comprising:
- a semiconductor substrate;
- a first source/drain region in the semiconductor substrate;
- a gate in the semiconductor substrate and disposed on opposing sides of the first source/drain region;
- a first source/drain contact electrically connected to the first source/drain region, the first source/drain contact extending between a first dielectric layer and a second dielectric layer, each of the first dielectric layer and the second dielectric layer contacting both the gate and the first source/drain region.
Dependencies are inferred from the claim text.