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US 2020/0006433 A1Published application
Word line with air-gap for non-volatile memories
AssigneeIntel Corporation
InventorsPrashant Majhi, Brian Doyle, Ravi Pillarisetty, Abhishek Sharma, Elijah V. Karpov
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Abstract
Integrated circuits including 3D memory structures are disclosed. Air-gaps are purposefully introduced between word lines. The word lines may be horizontal or vertical.
Claims20
An integrated circuit, comprising:
- a plurality of word lines (WLs), wherein said WLs are arranged in a stacked configuration with respect to one another;
- one or more air-gaps arranged between at least some of said WLs;
- a plurality of bit lines (BLs), wherein one or more said BLs intersects one or more said WLs;
- and
- an array of memory cells, at least some of the memory cells being addressable by corresponding ones of said WLs and BLs.
2 more elements
An integrated circuit, comprising:
- a first word line (WL) and a second WL;
- an air-gap between the first WL and second WL;
- a memory cell including
- a switching layer including an oxide material,
- a selector layer, for causing a change of state of said RRAM switching material, and
- a metal electrode layer;
- and
- a bit line (BL).
5 more elements
A method for fabricating an integrated circuit, the method comprising:
- removing a sacrificial layer in a stack of layers, the stack including first and second word line (WL) layers on opposing sides of the sacrificial layer, thereby creating a void;
- and
- non-conformally depositing an insulator layer into said void to create an air-gap between said first and second WL layers.
Dependencies are inferred from the claim text.