Display device

A display device comprising:

• a first driving transistor in a first pixel region of a substrate and having a first semiconductor layer and a first gate electrode, wherein the first semiconductor layer comprises a first source region, a first drain region, and a first channel region;
• a second driving transistor in a second pixel region adjacent to the first pixel region of the substrate and having a second semiconductor layer and a second gate electrode, wherein the second semiconductor layer comprises a second source region, a second drain region, and a second channel region;
• a first electrode layer facing at least a portion of the first source region or the first drain region;
• a second electrode layer facing the first gate electrode and at least a portion of the first source region or the first drain region;
• a third electrode layer facing at least a portion of the second source region or the second drain region;
• a fourth electrode layer facing the second gate electrode and at least a portion of the second source region or the second drain region;
• and
• a power line electrically connected to the first electrode layer, second electrode layer, third electrode layer, and fourth electrode layer.

A display device comprising:

• a first driving transistor disposed in a first pixel region of the substrate, and having a first semiconductor layer and a first gate electrode, a first capacitor and a second capacitor, wherein the first semiconductor layer comprises a first source region and a first drain region, the first capacitor comprises a first lower electrode and a first upper electrode and the second capacitor comprises a second lower electrode and a second upper electrode;
• and
• a power line electrically connected to the first upper electrode and the second lower electrode,
• wherein the first lower electrode and the second upper electrode are portions of the first source region or the first drain region,
• the first upper electrode is disposed on an upper layer of the first semiconductor layer, and
• the second lower electrode is disposed on a lower layer of the first semiconductor layer.