Stacked Vertically Isolated Mosfet Structure and Method of Forming the Same

A semiconductor device comprising:

• a first MOSFET over a substrate, the first MOSFET comprising:
• a first gate stack;
• a first buffer layer, the first buffer layer being disposed on opposite sides of the first gate stack;
• and
• a first channel layer over the first gate stack and the first buffer layer;
• a residual gate stack over the first channel layer, the residual gate stack comprising:
• a first insulator over the first channel layer;
• a first conductive material on an upper surface and a lower surface of the first insulator;
• and
• first spacers on opposite sidewalls of the first insulator;
• an isolation structure over the first channel layer, the isolation structure comprising:
• a first dielectric extending between sidewalls of the first insulator, the first dielectric extending between an upper surface of the first conductive material and a lower surface of the first conductive material;
• a second dielectric material on a first sidewall of the first spacers, the second dielectric material being disposed on the first channel layer;
• and
• a third dielectric material on a second sidewall of the first spacers opposite the first sidewall of the first spacers, the third dielectric material being disposed on the first channel layer;
• and
• a second MOSFET over the isolation structure and the residual gate stack, the second MOSFET comprising:
• a second channel layer;
• and
• a second gate stack disposed over the second channel layer.

A method comprising:

• forming a fin structure over a substrate, wherein forming the fin structure comprises:
• forming a first buffer layer over the substrate;
• forming a first channel layer over the first buffer layer;
• forming a second buffer layer over the first channel layer;
• forming a second channel layer over the second buffer layer;
• forming a third buffer layer over the second channel layer;
• and
• etching the third buffer layer, the second channel layer, the second buffer layer, the first channel layer, and the first buffer layer to form the fin structure;
• forming a mask structure over the substrate, the mask structure surrounding the fin structure, wherein forming the mask structure comprises:
• forming a first mask over the substrate;
• forming a second mask over the first mask;
• and
• forming a third mask over the second mask;
• etching a portion of the second mask to form a first opening exposing a sidewall of the second buffer layer;
• and
• etching a portion of the second buffer layer to form a second opening in the second buffer layer, wherein the portion of the second buffer layer is etched through the first opening, wherein the first mask and the third mask protect the first buffer layer and the third buffer layer, respectively, while etching the portion of the second buffer layer.