Staircase structures for three-dimensional memory device double-sided routing

A three-dimensional (3D) memory device, comprising:

• a substrate;
• a memory stack disposed above the substrate and comprising a plurality of conductor/dielectric layer pairs stacked alternatingly and staggered laterally, wherein a length of each of the plurality of conductor/dielectric layer pairs is the same;
• and
• an array of memory strings each extending vertically through the memory stack.

A three-dimensional (3D) memory device, comprising:

• a substrate;
• a memory stack disposed above the substrate and comprising a plurality of conductor/dielectric layer pairs stacked alternatingly;
• an array of memory strings each extending vertically through an inner region of the memory stack, wherein an outer region of the memory stack comprises a staircase structure disposed on the substrate, and edges of the plurality of conductor/dielectric layer pairs in the staircase structure along the vertical direction away from the substrate are staggered laterally away from the array of memory strings;
• an interconnect layer disposed below the memory stack;
• and
• a plurality of first via contacts each in contact with a conductor layer in one of the conductor/dielectric layer pairs in the staircase structure, the first via contacts each electrically connected to the interconnect layer.