Three-dimensional memory device with reduced etch damage to memory films and methods of making the same

The monolithic three-dimensional memory device of claim 9, wherein:

• the first memory film comprises a first tunneling dielectric;
• the second memory film comprises a second tunneling dielectric;
• and
• the second tunneling dielectric is not in direct contact with the first tunneling dielectric.

A monolithic three-dimensional memory device, comprising:

• a first alternating stack of first insulating layers and first electrically conductive layers located over a top surface of a substrate;
• an insulating cap layer overlying the first alternating stack;
• a second alternating stack of second insulating layers and second electrically conductive layers overlying the insulating cap layer;
• a memory opening extending through the second alternating stack, the insulating cap layer, and the first alternating stack;
• and
• a memory stack structure located within the memory opening and comprising a semiconductor channel, a first memory film laterally surrounding the semiconductor channel and embedded within the first alternating stack, and a second memory film laterally surrounding semiconductor channel and embedded within the second alternating stack,
• wherein the second memory film is not in direct contact with the first memory film;
• wherein the semiconductor channel continuously vertically extends at least from a level of a second bottommost electrically conductive layer within the first alternating stack to a level of a topmost electrically conductive layer within the second alternating stack;
• wherein a horizontal surface of the semiconductor channel directly contacts a bottommost second insulating layer of the second insulating layers within the second alternating stack;
• wherein the horizontal surface of the semiconductor channel is coplanar with a top surface of the insulating cap layer;
• wherein the semiconductor channel comprises:
• a first vertically-extending portion located within the first alternating stack;
• a second vertically-extending portion located within the second alternating stack;
• and
• a ledge portion connecting the first vertically-extending portion and the second vertically-extending portion, located within the insulating cap layer, and including the horizontal surface of the semiconductor channel that contacts the bottommost second insulating layer of the second insulating layers within the second alternating stack;
• and
• wherein the ledge portion comprises:
• a cylindrical sidewall of the semiconductor channel that contacts a sidewall of the insulating cap layer;
• a convex surface that adjoins a bottom end of the cylindrical sidewall and having a periphery that adjoins an outer sidewall of the first memory film;
• and
• a cylindrical contact surface that adjoins the convex surface and contacting the outer sidewall of the first memory film.

A monolithic three-dimensional memory device, comprising:

• a first alternating stack of first insulating layers and first electrically conductive layers located over a top surface of a substrate;
• an insulating cap layer overlying the first alternating stack;
• a second alternating stack of second insulating layers and second electrically conductive layers overlying the insulating cap layer;
• a memory opening extending through the second alternating stack, the insulating cap layer, and the first alternating stack;
• and
• a memory stack structure located within the memory opening and comprising a semiconductor channel, a first memory film laterally surrounding the semiconductor channel and embedded within the first alternating stack, and a second memory film laterally surrounding semiconductor channel and embedded within the second alternating stack,
• wherein the second memory film is not in direct contact with the first memory film;
• wherein the semiconductor channel continuously vertically extends at least from a level of a second bottommost electrically conductive layer within the first alternating stack to a level of a topmost electrically conductive layer within the second alternating stack;
• wherein a horizontal surface of the semiconductor channel directly contacts a bottommost second insulating layer of the second insulating layers within the second alternating stack;
• wherein the horizontal surface of the semiconductor channel is coplanar with a top surface of the insulating cap layer;
• wherein the semiconductor channel comprises:
• a first vertically-extending portion located within the first alternating stack;
• a second vertically-extending portion located within the second alternating stack;
• and
• a ledge portion connecting the first vertically-extending portion and the second vertically-extending portion, located within the insulating cap layer, and including the horizontal surface of the semiconductor channel that contacts the bottommost second insulating layer of the second insulating layers within the second alternating stack;
• and
• further comprising a dielectric core located within the semiconductor channel and including a laterally protruding portion embedded within the insulating cap layer and having a top surface that contacts a first region of the ledge portion of the semiconductor channel and having a bottom surface that contacts a second region of the ledge portion of the semiconductor channel.