Three-dimensional memory device having a shielding layer and method for forming the same
AssigneeYangtze Memory Technologies Co., Ltd.
InventorsZongliang Huo, Li Hong Xiao
Life of this patent
Estimating the term…
Abstract
Embodiments of three-dimensional (3D) memory devices having a shielding layer and methods for forming the 3D memory devices are disclosed. In an example, a 3D memory device includes a substrate, a peripheral device disposed on the substrate, a semiconductor layer disposed above the peripheral device, a plurality of memory strings each extending vertically on the semiconductor layer, and a shielding layer disposed between the peripheral device and the semiconductor layer. The shielding layer includes a conduction region configured to receive a grounding voltage during operation of the 3D memory device.
Claims30
A three-dimensional (3D) memory device, comprising:
- a substrate;
- a peripheral device disposed on the substrate;
- a semiconductor layer disposed above the peripheral device;
- a plurality of memory strings each extending vertically on the semiconductor layer;
- and
- a shielding layer disposed between the peripheral device and the semiconductor layer, wherein the shielding layer comprises a conduction region configured to receive a grounding voltage during operation of the 3D memory device.
A three-dimensional (3D) memory device, comprising:
- a substrate;
- a plurality of memory strings each extending vertically on the substrate;
- a semiconductor layer disposed above the plurality of memory strings;
- a peripheral device disposed on the semiconductor layer;
- and
- a shielding layer disposed between the plurality of memory strings and the semiconductor layer, wherein the shielding layer comprises a conduction region configured to receive a grounding voltage during operation of the 3D memory device.
A method for forming a three-dimensional (3D) memory device, comprising:
- forming a peripheral device on a substrate;
- forming a first interconnect layer comprising a first plurality of interconnects above the peripheral device;
- forming a shielding layer comprising a conduction region above the first interconnect layer;
- forming a second interconnect layer comprising a second plurality of interconnects above the shielding layer, wherein the conduction region of the shielding layer covers an area of the first and second plurality of interconnects in the first and second interconnect layers;
- and
- forming a plurality of memory strings each extending vertically above the second interconnect layer.
A method for forming a three-dimensional (3D) memory device, comprising:
- forming a plurality of memory strings each extending vertically on a substrate;
- forming a first interconnect layer comprising a first plurality of interconnects above the plurality of memory strings;
- forming a shielding layer comprising a conduction region above the first interconnect layer;
- forming a second interconnect layer comprising a second plurality of interconnects above the shielding layer, wherein the conduction region of the shielding layer covers an area of the first and second plurality of interconnects in the first and second interconnect layers;
- and
- forming a peripheral device above the second interconnect layer.
Dependencies are inferred from the claim text.