Embedded ferroelectric memory in high-k first technology
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWei Cheng Wu, Pai Chi Chou
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Abstract
In some embodiments, the present disclosure relates to an integrated circuit. The integrated circuit has a first doped region and a second doped region within a substrate. A FeRAM (ferroelectric random access memory) device is arranged over the substrate between the first doped region and the second doped region. The FeRAM device has a ferroelectric material and a conductive electrode. The ferroelectric material is arranged over the substrate and the conductive electrode is arranged over the ferroelectric material and between sidewalls of the ferroelectric material.
Claims20
An integrated chip, comprising:
- a first doped region and a second doped region within a substrate;
- an FeRAM (ferroelectric random access memory) device arranged over the substrate between the first doped region and the second doped region, wherein the FeRAM device comprises:
- a ferroelectric material arranged over the substrate;
- and
- a conductive electrode over the ferroelectric material and between sidewalls of the ferroelectric material.
An integrated chip, comprising:
- a substrate having a recessed surface extending between a first sidewall and a second sidewall to define a depressed region that is recessed below an upper surface of the substrate;
- a first doped region and a second doped region disposed within the recessed surface of the substrate;
- a ferroelectric material arranged between the first doped region and the second doped region, wherein the ferroelectric material has sidewalls defining a first recess within an upper surface of the ferroelectric material;
- a metallic material nested within the first recess, wherein metallic material has sidewalls defining a second recess within an upper surface of the metallic material;
- and
- a conductive material nested within the second recess.
A method of forming an integrated chip, comprising:
- forming a sacrificial memory structure over a substrate;
- forming an inter-level dielectric (ILD) layer over the substrate and laterally surrounding the sacrificial memory structure;
- removing the sacrificial memory structure to form a memory device cavity surrounded by the ILD layer;
- forming a ferroelectric layer over the ILD layer and within the memory device cavity;
- forming a metallic layer over the ferroelectric layer and within the memory device cavity;
- forming a conductive layer over the metallic layer and within the memory device cavity;
- and
- removing parts of the ferroelectric layer, the metallic layer, and the conductive layer from over the ILD layer to define a Fe RAM device having a metallic material disposed between a ferroelectric material and a conductive material.
Dependencies are inferred from the claim text.