Gate formation scheme for nanosheet transistors having different work function metals and different nanosheet width dimensions

Abstract

Embodiments of the invention are directed to a configuration of nanosheet FET devices formed on a substrate. A non-limiting example of the nanosheet FET devices includes a first nanosheet FET having a first channel nanosheet, a second channel nanosheet over the first nanosheet, a first gate structure around the first channel nanosheet, and a second gate structure around the second channel nanosheet, wherein a first air gap is between the first gate structure and the second gate structure. The nanosheet FET devices further include a second nanosheet FET having a third channel nanosheet, a fourth channel nanosheet over the third nanosheet, a third gate structure around the third channel nanosheet, and a fourth gate structure around the fourth channel nanosheet, wherein a second air gap is between the third gate structure and the fourth gate structure.

Dependencies are inferred from the claim text.