Semiconductor device

A semiconductor device, comprising:

• a substrate;
• a plurality of lower electrodes on the substrate, individual lower electrodes of the plurality of lower electrodes being repeatedly arranged in a first direction and in a second direction that crosses the first direction;
• and
• a first electrode support contacting a sidewall of at least one of the plurality of lower electrodes to support the at least one of the plurality of lower electrodes, the first electrode support including:
• a first support region, the first support region including first openings, and
• a second support region at a border of the first support region, the second support region including first sidewalls extending in the first direction, second sidewalls extending in the second direction, and connecting sidewalls connecting the first sidewalls with the second sidewalls, the connecting sidewalls having a linear shape in a top view.

A semiconductor device, comprising:

• a substrate;
• a plurality of lower electrodes arranged in rows on the substrate, the rows extending in a first direction and being spaced apart from each other in a second direction that crosses the first direction, every two rows adjacent to each in the second direction being offset with respect to each other in the first direction to have lower electrodes aligned along a third direction at an oblique angle with respect to the first and second directions;
• a first electrode support contacting a sidewall of at least one of the plurality of lower electrodes to support the at least one of the plurality of lower electrodes, the first electrode support including:
• a first support region, the first support region including first openings, and
• a second support region at a border of the first support region, the second support region including first sidewalls extending in the first direction, second sidewalls extending in the second direction, and connecting sidewalls connecting the first sidewalls with the second sidewalls, at least some of the connecting sidewalls being parallel to the third direction.

A semiconductor device, comprising:

• a substrate including a cell region and a peripheral region;
• a plurality of peripheral lower electrodes in the peripheral region of the substrate, individual lower electrodes of the plurality of peripheral lower electrodes being repeatedly arranged in a first direction and in a second direction that crosses the first direction;
• a peripheral dielectric film along profiles of the plurality of peripheral lower electrodes;
• a plurality of peripheral upper electrodes on the peripheral dielectric film, the pluralities of peripheral upper and lower electrodes with the peripheral dielectric film therebetween defining peripheral capacitors in the peripheral region;
• a plurality of cell lower electrodes in the cell region of the substrate, individual lower electrodes of the plurality of cell lower electrodes being repeatedly arranged in the first and second directions;
• a cell dielectric film along profiles of the plurality of cell lower electrodes;
• a plurality of cell upper electrodes on the cell dielectric film, the pluralities of cell upper and lower electrodes with the cell dielectric film therebetween defining cell capacitors in the cell region;
• a cell electrode support contacting a sidewall of at least one of the plurality of cell lower electrodes to support the at least one of the plurality of cell lower electrodes, the cell electrode support including:
• a first support region, the first support region including first openings, and
• a second support region at a border of the first support region, the second support region including first sidewalls extending in the first direction, second sidewalls extending in the second direction, and connecting sidewalls connecting the first sidewalls with the second sidewalls, the connecting sidewalls having a linear shape in a top view;
• and
• a peripheral electrode support contacting a sidewall of at least one of the plurality of peripheral lower electrodes to support the at least one of the plurality of peripheral lower electrodes, the peripheral electrode support including:
• a third support region, the third support region including third openings, and
• a fourth support region at a border of the third support region, the fourth support region including third sidewalls extending in the first direction, and fourth sidewalls extending in the second direction and connected to the third sidewalls.