Semiconductor device and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen LUNG, Long-Jie HONG, Kang-Min KUO
Life of this patent
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Abstract
A method of manufacturing a semiconductor device includes forming a first transistor structure and a second transistor structure on a substrate, wherein source/drain structures of the first transistor structure and the second transistor structure are merged. The first and second transistor structures are separated by etching the source/drain structures.
Claims20
A method of manufacturing a semiconductor device, comprising:
- forming a first transistor structure and a second transistor structure on a substrate, wherein source/drain structures of the first transistor structure and the second transistor structure are merged;
- and
- separating the first and second transistor structures by etching the merged source/drain structures.
A method of manufacturing a semiconductor device including a plurality of fin field effect transistors (FinFETs), the method comprising:
- forming a first fin structure and a second fin structure over a substrate, the first and second fin structures extending in a first direction in plan view,
- forming an isolation insulating layer over the substrate so that lower portions of the first and second fin structures are embedded in the isolation insulating layer and upper portions of the first and second fin structures are exposed from the isolation insulating layer;
- forming a gate structure over parts of the first and second fin structures, the gate structure including a gate pattern, a dielectric layer disposed between the gate pattern and the first and second fin structures, and a cap insulating layer disposed over the gate pattern, the gate structure extending in a second direction crossing the first direction in plan view;
- recessing upper portions of the first and second fin structures,
- forming an epitaxial source/drain structure over the recessed first fin structure and the recessed second fin structure,
- wherein the epitaxial source/drain structure is a merged structure such that a void is formed between the merged source/drain structure and the isolation insulating layer;
- and
- etching a portion of the merged epitaxial structure between the first and second fin structures to form a first epitaxial source/drain structure and a second epitaxial source/drain structure.
A semiconductor device comprising a plurality of transistors disposed over a common substrate, comprising:
- a first transistor comprising a plurality of first fin structures and a second transistor comprising a plurality of second fin structures;
- a first merged source/drain structure disposed over the first plurality of fin structures;
- and
- a second merged source drain structure disposed over the second plurality of fin structures,
- wherein a pair of adjacent first fin structures are spaced apart by a distance S1 and a pair of adjacent second fin structures are spaced apart by the distance S1,
- wherein one of the first fin structures is spaced apart from one of the second fin structures adjacent to the one of the first fin structures by a distance S2,
- wherein the first merged source/drain structure is spaced apart from the second merged source/drain structure by a distance S3, and
- a ratio of S2/S3 ranges from 1.25/1 to 25/1.
Dependencies are inferred from the claim text.