Manufacturing process for separating logic and memory array
AssigneeWestern Digital Technologies, Inc.
InventorsHem Takiar, Michael Mostovoy, Emilio Yero, Gokul Kumar, Yan Li
Life of this patent
Estimating the term…
Abstract
A semiconductor device is disclosed including an integrated memory module. The integrated memory module may include a pair of semiconductor die, which together, operate as a single, integrated flash memory. In one example, the first die may include the memory cell array and the second die may include the logic circuit such as CMOS integrated circuits. In one example, the second die may be flip-chip bonded to the first die. The flip-chip bond pads on the first and second dies may be made small, with a small pitch, to allow a large number of electrical interconnections between the first and second semiconductor dies.
Claims21
An integrated memory module comprising:
- a first semiconductor die comprising a first group of bond pads and a second group of bond pads;
- a second semiconductor comprising a third group of bond pads flip-chip bonded to the first group of bond pads of the first semiconductor die to electrically and physically couple the second semiconductor die to the first semiconductor die;
- wherein the first and second coupled semiconductor dies together are configured as an integrated flash memory.
An integrated memory module comprising:
- a first semiconductor die comprising:
- a plurality of memory cells,
- a first group of bond pads electrically coupled to the plurality of memory cells, and
- a second group of bond pads;
- a second semiconductor comprising:
- control circuits for controlling access to the plurality of memory cells on the first semiconductor die, and
- a third group of bond pads flip-chip bonded the first group of bond pads of the first semiconductor die to electrically and physically couple the second semiconductor die to the first semiconductor die;
- wherein the first and second coupled semiconductor dies together are configured as an integrated flash memory.
A method of fabricating a semiconductor device, comprising:
- (a) forming a first plurality of bond pads on a first semiconductor die;
- (b) forming a second plurality of bond pads on a second semiconductor die;
- and
- (c) mounting at least some of the first plurality of bond pads to the second plurality of bond pads, the first semiconductor die and the second semiconductor die together being configured as an integrated flash memory.
An integrated memory module comprising:
- a first semiconductor die comprising first bond pad means for electrically connecting the first semiconductor die, and second bond pad means for electrically connecting the first semiconductor die;
- a second semiconductor comprising third bond pads means for flip-chip bonding to the first bond pad means;
- wherein the first and second coupled semiconductor dies together are configured as an integrated flash memory.
Dependencies are inferred from the claim text.