Dc and ac magnetic field protection for mram device using magnetic-field-shielding structure

A memory device comprising:

• a chip including a magnetoresistive random access memory (MRAM) cell, wherein the chip comprises an upper face, a bottom face and sidewalls extending between the upper face and the bottom face;
• and
• a magnetic field shielding structure at least partially surrounding the chip comprising a multilayer stack, the multilayer stack is comprised of a magnetic layer and a dielectric layer, wherein the magnetic field shielding structure comprises a top region above the upper face of the chip, a bottom region below the bottom face of the chip, and a sidewall region laterally surrounding the sidewalls of the chip, wherein openings exists in the sidewall region of the magnetic field shielding structure, electric connectors extend through the openings and couple to the chip, wherein a first magnetic region is located inside an inner surface of the magnetic field shielding structure and a second magnetic region is located immediately outside an outer surface of the magnetic field shielding structure, a magnetic field in the first magnetic region is less than a magnetic field in the second magnetic region.