Method of Forming RDLS and Structure Formed Thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHung-Jui Kuo, Yun Chen Hsieh, Hui-Jung Tsai, Chen-Hua Yu
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Abstract
A method includes encapsulating a device die in an encapsulating material, planarizing the device die and the encapsulating material, and forming a first plurality of conductive features electrically coupling to the device die. The step of forming the first plurality of conductive features includes a deposition-and-etching process, which includes depositing a blanket copper-containing layer, forming a patterned photo resist over the blanket copper-containing layer, and etching the blanket copper-containing layer to transfer patterns of the patterned photo resist into the blanket copper-containing layer.
Claims20
A method comprising:
- encapsulating a device die in an encapsulating material;
- and
- forming a first plurality of conductive features electrically coupling to the device die, wherein the forming the first plurality of conductive features comprises a deposition-and-etching process comprising:
- depositing a blanket copper-containing layer;
- forming a patterned photo resist over the blanket copper-containing layer;
- and
- etching the blanket copper-containing layer to transfer patterns of the patterned photo resist into the blanket copper-containing layer.
A method comprising:
- forming a plurality of vias comprising:
- depositing a first adhesion layer;
- depositing a blanket copper-containing layer over the first adhesion layer;
- forming a first patterned photo resist over the blanket copper-containing layer;
- and
- etching the blanket copper-containing layer and the first adhesion layer;
- depositing a first dielectric layer to embed the plurality of vias;
- performing a first planarization on the first dielectric layer and the plurality of vias;
- forming a plurality of metal lines comprising:
- depositing a metal seed layer over and contacting the plurality of vias;
- depositing a second patterned photo resist over the metal seed layer;
- plating metal regions in the second patterned photo resist;
- removing the second patterned photo resist;
- and
- etching portions of the metal seed layer;
- depositing a second dielectric layer to embed the plurality of metal lines;
- and
- performing a second planarization on the second dielectric layer and the metal regions.
A structure comprising:
- a device die;
- a first plurality of conductive features over and electrically coupling to the device die, wherein the first plurality of conductive features have first sidewalls with first tilt angles smaller than 85 degrees;
- and
- a second plurality of conductive features over and electrically coupling to the first plurality of conductive features, wherein the second plurality of conductive features have second sidewalls with second tilt angles greater than 85 degrees and equal to or smaller than about 90 degrees.
Dependencies are inferred from the claim text.