Bond-over-active circuity gallium nitride devices
AssigneeSemiconductor Components Industries, LLC
InventorsWoochul JEON, Chun-Li LIU
Life of this patent
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Abstract
Implementations of semiconductor devices may include: a first layer with a plurality of cells, each cell having a drain finger, a source finger and a gate ring; a second layer having a drain pad and a source pad, the drain pad having a width and a source pad having a width substantially the same as the drain pad; wherein a width of each drain finger of the first layer is wider than a width of each source finger of the first layer; and wherein each drain pad is coupled to each drain finger through a first contact and the source pad is coupled to each source finger through a second contact, where a width of the first contact is wider than a width of the second contact.
Claims18
A semiconductor device comprising:
- a first metal layer comprising an active area and a non-active area;
- a second metal layer comprising at least one drain pad, at least one source pad and at least one gate pad;
- and
- at least one gate bus;
- wherein the active area comprises a plurality of source fingers and a plurality of drain fingers interdigitated with one another;
- wherein the at least one drain pad is coupled to the plurality of drain fingers at one end of the plurality of drain fingers;
- wherein the at least one drain pad is located only in the non-active area of the first metal layer;
- and
- wherein the first metal layer is electrically coupled to the second metal layer.
A semiconductor device comprising:
- a first metal layer comprising an active area and a non-active area;
- and
- a second metal layer comprising at least one drain pad, at least one source pad and at least one gate pad;
- wherein the active area comprises a plurality of source fingers and a plurality of drain fingers interdigitated with one another;
- wherein the at least one drain pad is coupled to the plurality of drain fingers at one end of the plurality of drain fingers;
- wherein the at least one drain pad is located only in the non-active area of the first metal layer;
- and
- wherein the first metal layer is electrically coupled to the second metal layer.
A semiconductor device comprising:
- a first metal layer comprising an active area and a non-active area;
- a second metal layer comprising at least one drain pad and at least one source pad;
- and
- one of at least one gate bus, at least one gate pad, or at least one gate bus and at least one gate pad;
- wherein the active area comprises a plurality of source fingers and a plurality of drain fingers interdigitated with one another;
- wherein the at least one drain pad is coupled to the plurality of drain fingers at one end of the plurality of drain fingers;
- wherein the at least one drain pad is located only in the non-active area of the first metal layer;
- and
- wherein the first metal layer is electrically coupled to the second metal layer.
Dependencies are inferred from the claim text.