Method of manufacturing a semiconductor device and a semiconductor device

A method of manufacturing a semiconductor device, comprising:

• forming a first semiconductor layer having a first composition over a semiconductor substrate;
• forming a second semiconductor layer having a second composition over the first semiconductor layer;
• forming another first semiconductor layer having the first composition over the second semiconductor layer;
• forming another second semiconductor layer having the second composition over the another first semiconductor layer;
• patterning the first semiconductor layers, second semiconductor layers, and the semiconductor substrate to form a plurality of fin structures extending in a first direction,
• wherein the fin structures include a first region adjacent the semiconductor substrate and a second region including the first semiconductor layers and second semiconductor layers, and
• wherein the second region includes a first portion extending along the first direction between a pair of second portions;
• forming an insulating liner layer over the fin structures;
• forming an isolation insulating layer between the fin structures;
• removing the isolation insulating layer from between a first pair of adjacent fin structures;
• forming a first conductive layer between the first pair of adjacent fin structures;
• removing the insulating liner layer from the second region of the fin structures;
• removing the first semiconductor layer from a first portion of the second region of the fin structures thereby forming nanowires comprising the second semiconductor layer;
• forming a dielectric layer and a second conductive layer over the first portion of the fin structures surrounding the nanowires thereby forming a gate electrode structure extending in a second direction substantially perpendicular to the first direction;
• and
• forming a metallization layer comprising a plurality of conductive lines over gate electrode structure.

A semiconductor device comprising:

• a plurality of fin structures extending in a first direction disposed over a semiconductor substrate,
• wherein each fin structure includes a first region proximate to the semiconductor substrate and a second region distal to the semiconductor substrate;
• at least one first electrically conductive layer disposed between the first regions of an adjacent pair of fins;
• at least one gate electrode structure extending in a second direction substantially perpendicular to the first direction disposed over a first portion of the fin structure second region;
• and
• a metallization layer including at least one conductive line disposed over the gate electrode structure.