Methods for Improving Interlayer Dielectric Layer Topography
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKuan-Wei Su, Chun Yu Huang, Chih-Hsun Lin, Ping-Pang Hsieh
Life of this patent
Estimating the term…
Loading patent…
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKuan-Wei Su, Chun Yu Huang, Chih-Hsun Lin, Ping-Pang Hsieh
Estimating the term…
Methods for improving interlayer dielectric (ILD) layer topography and resulting integrated circuit devices are disclosed herein. An exemplary method includes forming a first contact etch stop layer having a first thickness over a first region of a wafer, forming a second contact etch stop layer having a second thickness over a second region of the wafer, and forming an ILD layer over the first contact etch stop layer and the second contact etch stop layer. A first topography variation exists between the first region and the second region. The second thickness is different than the first thickness to achieve a second topography variation that is less than the first topography variation. The first topography variation can be caused by a height difference between a first gate structure disposed over the wafer in the first region and a second gate structure disposed over the wafer in the second region.
A method comprising:
A method comprising:
-20. (canceled)
A method comprising:
Dependencies are inferred from the claim text.