System and Methods for Changing Addresses of One or More Components
AssigneeLexmark International, Inc.
InventorsStephen Porter Bush, Timothy John Rademacher
Life of this patent
Estimating the term…
Abstract
Component circuitry for a replaceable printer component includes an interface for coupling to a master device and an address generator coupled to the interface for generating a plurality of addresses for a plurality of components. When the interface receives a command from the master device, the address generator updates a pseudorandom number generator (PRNG) state and generates the plurality of addresses by retrieving different sets of bits from the PRNG state for each of the plurality of components. For each of the plurality of components, the component circuitry assigns one of the plurality of addresses to one of the plurality of components based upon a value associated with the one component.
Claims20
Component circuitry, comprising:
- an interface for coupling to a master device;
- and
- an address generator coupled to the interface for generating a plurality of addresses for a plurality of components, wherein when the interface receives a command from the master device, the address generator updates a pseudorandom number generator (PRNG) state, generates the plurality of addresses by retrieving successive bits from the PRNG state for each of the plurality of components, and determines whether the candidate address is a valid address by determining whether the candidate address is a reserved address.
A supply item for installation in an imaging device having a master controller, comprising:
- a housing;
- and
- a chip connected to the housing, the chip having an address generator coupled for generating a plurality of addresses for the supply item, wherein when the chip receives a command from the master controller, the address generator updates a pseudorandom number generator (PRNG) state, generates the plurality of addresses by retrieving successive bits from the PRNG state for the supply item, and determines whether the candidate address is a valid address by determining whether the candidate address is a default address.
A chip for installation with a supply item, comprising a memory for storing an address generator for generating a plurality of addresses for a plurality of supply items, wherein when the chip receives a command from a master device, the address generator updates a pseudorandom number generator (PRNG) state, generates the plurality of addresses by retrieving successive bits from the PRNG state for each of the plurality of supply items, and determines whether the candidate address is a valid address by determining whether the candidate address is an address that has been assigned to another component.
Dependencies are inferred from the claim text.