Erasure of multiple blocks in memory devices
AssigneeMicron Technology, Inc.
InventorsFulvio Rori, Giuseppe Cariello
Life of this patent
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Abstract
A variety of applications can include memory systems that have one or more memory devices capable of performing memory operations on multiple blocks of memory in response to a command from a host. For example, improvement in erase performance can be attained by erasing multiple blocks of memory by one of a number of approaches. Such approaches can include parallel erasure followed by serial verification in response to a single command. Other approaches can include sequential erase and verify operations of the multiple blocks in response to a single command. Additional apparatus, systems, and methods are disclosed.
Claims29
A system comprising:
- a controller;
- a memory device;
- and
- firmware having stored instructions, executable by the controller, to operate on the memory device, the instructions including operations to:
- generate a set of initial parameters for erasing multiple blocks of memory of the memory device;
- and
- perform an erase and verify operation on the multiple blocks by sequentially erasing and verifying each block of the multiple blocks in response to reception by the controller of a command to perform the erase and verify operation on the multiple blocks.
A method comprising:
- generating a set of initial parameters for erasing multiple blocks of memory of a memory device;
- and
- performing an erase and verify operation on the multiple blocks by sequentially erasing and verifying each block of the multiple blocks in response to receiving a command to perform the erase and verify operation on the multiple blocks.
A system comprising:
- a controller;
- a memory device;
- and
- firmware having stored instructions, executable by the controller, to operate on the memory device, the instructions including operations to:
- generate a set of initial parameters for erasure of multiple blocks of memory of the memory device;
- provide, simultaneously, an erase pulse to each block of the multiple blocks;
- and
- verify serially, after the erase pulse is issued, erasure of each block of the multiple blocks.
A method comprising:
- generating a set of initial parameters for erasing multiple blocks of memory of a memory device;
- providing, simultaneously, an erase pulse to each block of the multiple blocks;
- verifying serially, after the erase pulse is issued, erasure of each block of the multiple blocks.
Dependencies are inferred from the claim text.