# US 2019/0380211 A1 · Circuit carrier board and manufacturing method thereof

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- Number: US 2019/0380211 A1
- Document ID: US20190380211A1
- Status: Published application
- Kind: A1
- Application number: 16/503,500
- Filed: 2019-07-04
- Published: 2019-12-12
- Earliest claimed: 2018-06-08
- Assignees: Unimicron Technology Corp.
- Applicants: Unimicron Technology Corp.
- Inventors: Wei-Ti Lin; Chun-Hsien Chien; Fu-Yang Chen
- Web page: https://patentgrep.com/patent/US20190380211A1

## CPC

- H05K 3/4682: {Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil}
- H05K 1/113: {Via provided in pad; Pad over filled via}
- H05K 3/0097: {Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards (H05K3/0052 takes precedence)}
- H05K 3/4015: {using auxiliary conductive elements, e.g. pieces of metal foil, metallic spheres}
- H05K 3/4661: {Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor (other insulating materials H05K3/387)}
- H05K 3/4688: {Composite multilayer circuits, i.e. comprising insulating layers having different properties (having a special base or central core H05K3/4602)}
- H05K 3/007: {Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier (H05K1/187, H05K3/20 and H05K3/4682 take precedence)}
- H05K 2201/10234: Metallic balls
- H05K 2201/10522: Adjacent components
- H05K 2201/10734: Ball grid array [BGA]; Bump grid array
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS

## Abstract

A circuit carrier board includes a first substrate and a second substrate bonding to the first substrate. The first substrate includes a first circuit layer connecting to a plurality of conductive structure. The conductive structures connect to electronic elements. The second substrate contacts the first circuit layer. The second substrate includes a plurality of stacked dielectric layers, and a plurality of second circuit layers are disposed in the dielectric layers. The bottommost layer of the second circuit layers is exposed outside of the dielectric layers, and the topmost layer of the second circuit layers is electrically connected to the first circuit layer. The conductive structure includes a pad and a conductive via. The pad electrically connects to the first circuit layer. A linewidth of the first circuit layer is smaller than a linewidth of the second circuit layer. A manufacturing method of the circuit carrier board is also provided.

## Claims

### Claim 1

A manufacturing method of a circuit carrier board, comprising:
providing a first temporary carrier board;
forming a first substrate on the first temporary carrier board, wherein the first substrate comprises a first circuit layer and a plurality of conductive structures, and the conductive structures being adapted to be electrically connected to a plurality of electronic elements;
performing a bonding step of bonding the first substrate to a second temporary carrier board, and the conductive structures are located between the first circuit layer and the second temporary carrier board;
removing the first temporary carrier board;
forming a second substrate on the first substrate to bond the second substrate to the first substrate, wherein the second substrate comprising:
a plurality of dielectric layers; and
a plurality of second circuit layers disposed in the dielectric layers, wherein a bottommost layer of the second circuit layers is exposed outside of the dielectric layers, and a topmost layer of the second circuit layers is electrically connected to the first circuit layer; and
removing the second temporary carrier board.

### Claim 2 (depends on 1)

The manufacturing method of the circuit carrier board according to claim 1, wherein the step of forming the first substrate comprises:
forming a release layer on the first temporary carrier board;
forming the first circuit layer on the release layer;
forming an insulating layer on the release layer and covering the first circuit layer;
forming the conductive structures on the insulating layer, and the conductive structures are electrically connected to the first circuit layer; and
Forming an insulating adhesive material on the insulating layer, and the conductive structures are located between the insulating adhesive material and the insulating layer.

### Claim 3 (depends on 2)

The manufacturing method of the circuit carrier board according to claim 2, wherein the step of forming the first substrate further comprises:
performing a thinning process to remove a portion of the insulating adhesive material to form an insulating adhesive layer and exposing the conductive structures.

### Claim 4 (depends on 1)

The manufacturing method of the circuit carrier board according to claim 1, wherein the step of forming the second substrate comprises:
forming the dielectric layers stacked on the first substrate in sequence; and
forming the second circuit layers in the dielectric layers, and the second circuit layers are electrically connected to one another.

### Claim 5 (depends on 4)

The manufacturing method of the circuit carrier board according to claim 4, wherein the second substrate is disposed on the insulating layer.

### Claim 6 (depends on 1)

The manufacturing method of the circuit carrier board according to claim 1, wherein the step of forming the first substrate comprises:
forming a release layer on the first temporary carrier board;
forming the first circuit layer on the release layer; and
forming an insulating adhesive material on the first circuit layer.

### Claim 7 (depends on 6)

The manufacturing method of the circuit carrier board according to claim 6, wherein the second substrate is disposed on the insulating adhesive material.

### Claim 8 (depends on 6)

The manufacturing method of the circuit carrier board according to claim 6, wherein the step of forming the first substrate further comprises:
after the step of forming the second substrate on the first substrate, forming a plurality of contact windows in the insulating adhesive material to form an insulating adhesive layer; and
forming the conductive structures in the insulating adhesive layer, and the conductive structures are electrically connected to the first circuit layer through the contact windows.

### Claim 9 (depends on 1)

The manufacturing method of the circuit carrier board according to claim 1, further comprising:
forming a plurality of solder resist layers on the first substrate and the second substrate respectively, wherein the solder resist layers partially covering the conductive structures and the bottommost layer of the second circuit layers; and
disposing a plurality of solder balls and electrically connecting the solder balls to the bottommost layer of the second circuit layers.

### Claim 10

A circuit carrier board comprising:
a first substrate, comprising a first circuit layer and a plurality of conductive structures electrically connected to the first circuit layer, wherein the conductive structures being adapted to be electrically connected to the plurality of electronic elements; and
a second substrate is bonded to the first substrate and contacts the first circuit layer, wherein the second substrate comprising:
a plurality of dielectric layers stacked on the first substrate in sequence; and
a plurality of second circuit layers are disposed in the dielectric layers, wherein a bottommost layer of the second circuit layers is exposed outside of the dielectric layers, and a topmost layer of the second circuit layers is electrically connected to the first circuit layer,
wherein, the conductive structures comprises a plurality of pads and a plurality of conductive vias, and the pads are electrically connected to the first circuit layer through the conductive vias,
wherein, an orthographic projection of each of the conductive vias contacting a bottom surface of the first circuit layer on the second substrate is located within an orthographic projection of a top surface of each of the pads on the second substrate,
wherein a linewidth of the first circuit layer is smaller than a linewidth of the second circuit layer.

### Claim 11 (depends on 10)

The circuit carrier board according to claim 10, wherein the first substrate further comprises:
an insulating layer, wherein the first circuit layer is embedded in a surface of the insulating layer; and
an insulating adhesive layer is disposed on the other surface of the insulating layer opposite to the surface,
wherein, the conductive structures are disposed in the insulating layer, and portions of each of the pads are disposed on the other surface, and the insulating adhesive layer surrounds each of the pads.

### Claim 12 (depends on 11)

The circuit carrier board according to claim 11, wherein a material of the insulating layer is selected from the group consisting of an Ajinomoto build-up (ABF) film, an adhesive or a photosensitive dielectric material.

### Claim 13 (depends on 11)

The circuit carrier board according to claim 11, wherein a material of the insulating adhesive layer is selected from the group consisting of a thermosetting polymer or a photopolymer.

### Claim 14 (depends on 10)

The circuit carrier board according to claim 10, wherein the first substrate further comprises:
an insulating adhesive layer, wherein the first circuit layer is embedded in a surface of the insulating adhesive layer, and the insulating adhesive layer has a plurality of contact windows,
wherein, the conductive structures are disposed in the insulating adhesive layer, and the portions of the pads are disposed on the other surface opposite to the surface, and the conductive vias are respectively filled in the contact windows to contact the first circuit layer.

### Claim 15 (depends on 10)

The circuit carrier board according to claim 10, further comprising:
a plurality of solder resist layers respectively disposed on the first substrate and the second substrate, wherein the solder resist layers partially covered the conductive structures and the bottommost layer of the second circuit layers; and
a plurality of solder balls disposed on the second substrate and electrically connected to the bottommost layer of the second circuit layers.

### Claim 16 (depends on 10)

The circuit carrier board according to claim 10, wherein a spacing between any two of the adjacent pads is between a range of 10 microns to 60 microns.

### Claim 17 (depends on 10)

The circuit carrier board according to claim 10, wherein the linewidth of the first circuit layer is between a range of 1 micron to 5 microns.

### Claim 18 (depends on 10)

The circuit carrier board according to claim 10, wherein the linewidth of the first circuit layer is less than or equal to a diameter of the bottom surface of each of the conductive vias.

### Claim 19 (depends on 10)

The circuit carrier board according to claim 10, wherein the pads are adapted to be electrically connected to the electronic elements.

### Claim 20 (depends on 10)

The circuit carrier board according to claim 10, further comprising a plurality of surface-treated metal pads, wherein the metal pads are respectively in contact with and disposed on the pads and the bottommost layer of the second circuit layers.