# US 2019/0380207 A1 · Tape wiring board and semiconductor device

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- Number: US 2019/0380207 A1
- Document ID: US20190380207A1
- Status: Published application
- Kind: A1
- Application number: 16/399,105
- Filed: 2019-04-30
- Published: 2019-12-12
- Earliest claimed: 2018-06-12
- Assignees: Sharp Kabushiki Kaisha
- Applicants: Sharp Kabushiki Kaisha
- Inventors: NOBUAKI ASAYAMA
- Web page: https://patentgrep.com/patent/US20190380207A1

## CPC

- H05K 1/184: associated with components inserted in holes through the PCBs and wherein terminals of the components are connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes
- H10W 70/688: {Flexible insulating substrates}
- H05K 1/05: Insulated {conductive substrates, e.g. insulated} metal substrate
- H10W 70/635: {Through-vias}
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H05K 2201/10681: Tape Carrier Package [TCP]; Flexible sheet connector
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A tape wiring board includes an insulating film on which a semiconductor chip is mounted and metal layers formed on both principal surfaces, respectively, of the insulating film. That one of the metal layers which is formed on a first surface that is one principal surface of the insulating film and on which the semiconductor chip is mounted has a first electrode that is placed near substantially the center of a region on the first surface where the semiconductor chip is mounted.

## Claims

### Claim 1

A tape wiring board comprising:
an insulating film on which a semiconductor chip is mounted; and
metal layers formed on both principal surfaces, respectively, of the insulating film,
wherein that one of the metal layers which is formed on a first surface that is one principal surface of the insulating film and on which the semiconductor chip is mounted has a first electrode that is placed near substantially a center of a region on the first surface where the semiconductor chip is mounted.

### Claim 2 (depends on 1)

The tape wiring board according to claim 1, further comprising a via bored through the insulating film,
wherein that one of the metal layers which is formed on a second surface that is the other principal surface of the insulating film has a back-surface wire, and
the first electrode is connected to the back-surface wire via the via.

### Claim 3 (depends on 1)

The tape wiring board according to claim 1, wherein the metal layer that is formed on the first surface has a front-surface wire whose end is located near substantially the center of the region on the first surface where the semiconductor chip is mounted.

### Claim 4 (depends on 3)

The tape wiring board according to claim 3, wherein a plurality of the front-surface wires are arranged side by side in a predetermined direction, and
the ends of adjacent ones of the front-surface wires are placed out of alignment with each other in a direction substantially perpendicular to the predetermined direction.

### Claim 5

A semiconductor device comprising:
a semiconductor chip; and
an insulating film on which the semiconductor chip is mounted and on both principal surfaces of which metal layers are formed, respectively,
wherein the semiconductor chip has a semiconductor connection terminal located near substantially a center of a surface of the semiconductor chip that faces the insulating film, and
that one of the metal layers which is formed on a first surface that is one of the principal surfaces of the insulating film and on which the semiconductor chip is mounted has a first electrode, located near substantially a center of a region on the first surface where the semiconductor chip is mounted, that is connected to the semiconductor connection terminal.

### Claim 6 (depends on 5)

The semiconductor device according to claim 5, further comprising a via bored through the insulating film,
wherein that one of the metal layers which is formed on a second surface that is the other of the principal surfaces of the insulating film has a back-surface wire, and
the first electrode is connected to the back-surface wire via the via.

### Claim 7 (depends on 5)

The semiconductor device according to claim 5, wherein the metal layer that is formed on the first surface has a front-surface wire whose end is both located near substantially the center of the region on the first surface where the semiconductor chip is mounted and connected to the semiconductor connection terminal.

### Claim 8 (depends on 6)

The semiconductor device according to claim 6, wherein the metal layer that is formed on the first surface has a front-surface wire whose end is both located near substantially the center of the region on the first surface where the semiconductor chip is mounted and connected to the semiconductor connection terminal.

### Claim 9 (depends on 7)

The semiconductor device according to claim 7, wherein a plurality of the front-surface wires are arranged side by side in a predetermined direction, and
the ends of adjacent ones of the front-surface wires are placed out of alignment with each other in a direction substantially perpendicular to the predetermined direction.

### Claim 10 (depends on 8)

The semiconductor device according to claim 8, wherein a plurality of the front-surface wires are arranged side by side in a predetermined direction, and
the ends of adjacent ones of the front-surface wires are placed out of alignment with each other in a direction substantially perpendicular to the predetermined direction.

### Claim 11 (depends on 5)

The semiconductor device according to claim 5, wherein the semiconductor connection terminal is in contact with the first electrode and is placed within the first electrode.

### Claim 12 (depends on 5)

The semiconductor device according to claim 5, wherein the semiconductor connection terminal is placed so that a part of the semiconductor connection terminal makes contact with the first electrode.
