# US 2019/0379334 A1 · Amplifiers and amplifier modules having stub circuits

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- Number: US 2019/0379334 A1
- Document ID: US20190379334A1
- Status: Published application
- Kind: A1
- Application number: 16/004,553
- Filed: 2018-06-11
- Published: 2019-12-12
- Earliest claimed: 2018-06-11
- Assignees: NXP USA, Inc.
- Applicants: NXP USA, Inc.
- Inventors: ENVER KRVAVAC; JOSEPH GERARD SCHULTZ; YU-TING DAVID WU; NICK YANG
- Web page: https://patentgrep.com/patent/US20190379334A1

## CPC

- H03F 1/0288: {using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers}
- H01P 3/08: Microstrips; Strip lines
- H01P 3/088: {Stacked transmission lines}
- H03F 1/56: Modifications of input or output impedances, not otherwise provided for
- H03F 1/565: {using inductive elements}
- H03F 3/195: in integrated circuits
- H03F 3/213: in integrated circuits
- H03F 3/217: Class D power amplifiers; Switching amplifiers
- H03F 3/245: {with semiconductor devices only}
- H03F 3/60: Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators (H03F3/54 takes precedence)
- H05K 1/0231: {Capacitors or dielectric substances}
- H05K 1/0233: {Filters, inductors or a magnetic substance}
- H05K 1/0243: {Printed circuits associated with mounted high frequency components}
- H05K 1/0245: {Lay-out of balanced signal pairs, e.g. differential lines or twisted lines}
- H05K 1/181: associated with surface mounted components
- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H10W 44/501: {Inductive arrangements (H10W44/20 takes precedence)}
- H10W 44/601: {Capacitive arrangements (H10W44/20 takes precedence)}
- H03F 2200/222: A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier
- H03F 2200/387: A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
- H03F 2200/451: the amplifier being a radio frequency amplifier
- H04W 84/042: {Public Land Mobile systems, e.g. cellular systems}
- H05K 2201/09263: Meander
- H05K 2201/10166: Transistor
- H10W 44/234: {Arrangements for impedance matching}
- H10W 44/248: {for antennas}
- H10W 90/00: Package configurations
- H03F: AMPLIFIERS
- H01P: WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE (operating at optical frequencies G02B)
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H04W: WIRELESS COMMUNICATION NETWORKS (broadcast communication H04H; communication systems using wireless links for non-selective communication, e.g. wireless extensions H04M1/72)

## Abstract

An amplifier module is provided. The amplifier module includes a multi-layer printed circuit board (PCB). A first power transistor die is mounted at a top surface of the multi-layer PCB. A second power transistor die is mounted at the top surface of the multi-layer PCB. An impedance inversion element is coupled between an output of the first power transistor die and an output of the second power transistor die. A combining node is formed at the output of the second power transistor die. A stub circuit including a transmission line element is coupled at the combining node.

## Claims

### Claim 1

An amplifier module comprising:
a multi-layer printed circuit board (PCB);
a first power transistor die mounted at a top surface of the multi-layer PCB;
a second power transistor die mounted at the top surface of the multi-layer PCB;
an impedance inversion element coupled between an output of the first power transistor die and an output of the second power transistor die, a combining node formed at the output of the second power transistor die; and
a first stub circuit coupled at the combining node, the first stub circuit comprising a first transmission line element having a first end coupled to the combining node, the first stub circuit configured to have an electrical length of approximately 90 degrees; and
a second stub circuit coupled at the combining node in parallel with the first stub circuit, the second stub circuit configured to have an electrical length of approximately 60 degrees.

### Claim 2 (depends on 1)

The module of claim 1, wherein the first transmission line element is formed as a first stripline, the first stripline formed from a first inner conductive layer of the multi-layer PCB.

### Claim 3 (depends on 2)

The module of claim 2, wherein the impedance inversion element comprises a microstrip formed from a top conductive layer of the multi-layer PCB, at least a portion of the microstrip overlaps at least a portion of the first stripline.

### Claim 4 (depends on 1)

The module of claim 1, wherein the first stub circuit is configured to function as an open circuit at a fundamental frequency (F0) and as a shunt to a ground reference voltage at a second harmonic frequency (2*F0).

### Claim 5 (depends on 1)

The module of claim 1, wherein the first stub circuit further comprises a first capacitor, a first terminal of the first capacitor coupled to a second end of the first stripline.

### Claim 6 (depends on 5)

The module of claim 5, wherein the first capacitor comprises a surface mount capacitor mounted at the top surface of the multi-layer PCB.

### Claim 7 (depends on 6)

The module of claim 6, wherein the surface mount capacitor comprises a metal-insulator-metal (MIM) capacitor.

### Claim 8 (depends on 7)

The module of claim 7, wherein the first stub circuit further comprises an inductor coupled to the MIM capacitor.

### Claim 9 (depends on 2)

The module of claim 2, wherein the second stub circuit comprises a second stripline formed from a different inner conductive layer of the multi-layer PCB than the first stripline.

### Claim 10 (depends on 9)

The module of claim 9, wherein the second stub circuit is configured to function at a third harmonic frequency (3*F0) as a shunt to a ground reference voltage at the output of the second power transistor die and as an open circuit at the output of the first power transistor die.

### Claim 11 (depends on 1)

The module of claim 1, wherein the first power transistor die is configured to operate in a class AB mode and the second power transistor die is configured to operate in a class C mode.

### Claim 12

An amplifier module comprising:
a multi-layer printed circuit board (PCB);
a first power transistor die mounted at a top surface of the multi-layer PCB, the first power transistor die configured as a carrier amplifier;
a second power transistor die mounted at the top surface of the multi-layer PCB, the second power transistor die configured as a peaking amplifier;
an impedance inversion element coupled between an output of the first power transistor die and an output of the second power transistor die, a combining node formed at the output of the second power transistor die;
a first stub circuit coupled at the combining node, the first stub circuit comprising a first stripline having a first end coupled at the combining node, the first stub circuit configured to have an electrical length of approximately 90 degrees; and
a second stub circuit coupled at the combining node in parallel with the first stub circuit, the second stub circuit comprising a second stripline having a first end coupled at the combining node, the second stub circuit configured to have an electrical length of approximately 60 degrees.

### Claim 13 (depends on 12)

The module of claim 12, wherein the second power transistor die is oriented in a direction different from the first power transistor die.

### Claim 14

(canceled)

### Claim 15 (depends on 12)

The module of claim 12, wherein the first stripline is formed from a first inner conductive layer of the multi-layer PCB and the second stripline is formed from a second inner conductive layer of the multi-layer PCB.

### Claim 16 (depends on 12)

The module of claim 12, wherein the impedance inversion element comprises a microstrip formed from a top conductive layer of the multi-layer PCB, at least a portion of the microstrip overlaps at least a portion of the first stripline and at least a portion of the second stripline.

### Claim 17

(canceled)

### Claim 18

A Doherty amplifier comprising:
a multi-layer printed circuit board (PCB);
a carrier amplifier die mounted at a top surface of the multi-layer PCB;
a peaking amplifier die mounted at the top surface of the multi-layer PCB;
an impedance inversion element coupled between a drain terminal of the carrier amplifier die and a drain terminal of the peaking amplifier die, a combining node formed at the drain terminal of the peaking amplifier die;
a first stub circuit coupled at the combining node, the first stub circuit comprising a first stripline formed from a first conductive layer of the PCB, the first stub circuit configured to have an electrical length of approximately 90 degrees; and
a second stub circuit coupled at the combining node in parallel with the first stub circuit, the second stub circuit comprising a second stripline formed from a second conductive layer of the PCB different from the first conductive layer, the second stub circuit configured to have an electrical length of approximately 60 degrees.

### Claim 19 (depends on 18)

The amplifier of claim 18, wherein the first stub circuit is configured to function as an open circuit at a fundamental frequency (F0) and as a shunt to a ground reference voltage at a second harmonic frequency (2*F0).

### Claim 20

(canceled)

### Claim 21 (depends on 18)

The amplifier of claim 18, wherein the second stub circuit is configured to function at a third harmonic frequency (3*F0) as a shunt to a ground reference voltage at the output of the second power transistor die and as an open circuit at the output of the first power transistor die.

### Claim 22 (depends on 18)

The amplifier of claim 18, wherein the impedance inversion element comprises a microstrip formed from a top conductive layer of the multi-layer PCB, at least a portion of the microstrip overlaps at least a portion of the first stripline and at least a portion of the second stripline.

### Claim 23 (depends on 18)

The amplifier of claim 18, wherein the first stub circuit further comprises:
a capacitor, a first terminal of the capacitor coupled to a second end of the first stripline; and
an inductor coupled to the capacitor.