# US 2019/0378930 A1 · Thin film transistor and method for manufacturing the same, display panel and display device

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- Number: US 2019/0378930 A1
- Document ID: US20190378930A1
- Status: Published application
- Kind: A1
- Application number: 15/999,687
- Filed: 2017-12-14
- Published: 2019-12-12
- Earliest claimed: 2017-05-12
- Assignees: Boe Technology Group Co., Ltd.
- Applicants: Boe Technology Group Co., Ltd.
- Inventors: Jiangbo CHEN; Young Suk SONG; Wei LI; Liangchen YAN
- Web page: https://patentgrep.com/patent/US20190378930A1

## CPC

- H10D 30/6723: {having light shields}
- H10D 30/6729: {characterised by the electrodes}
- H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes}
- H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs}
- H10D 30/6758: {characterised by the insulating substrates}
- H10D 86/411: {characterised by materials, geometry or structure of the substrates}
- H10D 86/60: wherein the TFTs are in active matrices
- H10K 59/126: Shielding, e.g. light-blocking means over the TFTs
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

Embodiments of the present disclosure relate to a thin film transistor, a method for manufacturing the same, a display panel, and a display device. The thin film transistor includes a substrate, an active layer located on the substrate, and a light shielding layer, a first dielectric layer, and a second dielectric layer located between the substrate and the active layer, wherein the first dielectric layer is located between the second dielectric layer and the substrate, and wherein a refractive index of the first dielectric layer is greater than a refractive index of the second dielectric layer.

## Claims

### Claim 1

A thin film transistor comprising:
a substrate;
an active layer located on the substrate; and
a light shielding layer, a first dielectric layer, and a second dielectric layer located between the substrate and the active layer, wherein the first dielectric layer is located between the second dielectric layer and the substrate, and wherein a refractive index of the first dielectric layer is greater than a refractive index of the second dielectric layer.

### Claim 2 (depends on 1)

The thin film transistor according to claim 1, wherein the light shielding layer is located between the substrate and the first dielectric layer.

### Claim 3 (depends on 2)

The thin film transistor according to claim 2, further comprising a light blocking portion in the same layer as the light shielding layer and spaced apart from the light shielding layer on the substrate, wherein the first dielectric layer covers the light shielding layer and the light blocking portion.

### Claim 4 (depends on 3)

The thin film transistor according to claim 3, wherein a number of the light blocking portions is at least two, and wherein the light blocking portions are disposed on both sides of the light shielding layer.

### Claim 5 (depends on 3)

The thin film transistor according to claim 3, wherein a material of the light blocking portion is the same as a material of the light shielding layer.

### Claim 6 (depends on 5)

The thin film transistor according to claim 5, wherein a cross-sectional shape of the light blocking portion comprises one of a triangle, a circle, and a trapezoid.

### Claim 7 (depends on 1)

The thin film transistor according to claim 1, wherein the light shielding layer is located between the first dielectric layer and the second dielectric layer.

### Claim 8 (depends on 1)

The thin film transistor according to claim 1, wherein the first dielectric layer comprises silicon nitride and the second dielectric layer comprises silicon oxide.

### Claim 9 (depends on 1)

The thin film transistor according to claim 1, further comprising:
a gate stack located on the active layer, wherein the active layer comprises a channel region located under the gate stack and source/drain regions respectively located on both sides of the channel region, and wherein the gate stack comprises a gate insulating layer and a gate located on the gate insulating layer;
an interlayer insulating layer located on the second dielectric layer, the active layer, and the gate stack, wherein the interlayer insulating layer comprises vias exposing the source/drain regions;
source/drain electrodes located on the interlayer insulating layer and connected to the source/drain regions through the vias; and
a passivation layer located on the interlayer insulating layer and the source/drain electrodes.

### Claim 10

A method for manufacturing a thin film transistor, the method comprising:
forming a light shielding layer and a first dielectric layer on a substrate;
forming a second dielectric layer on the light shielding layer and the first dielectric layer to cover the light shielding layer and the first dielectric layer, wherein a refractive index of the first dielectric layer is greater than a refractive index of the second dielectric layer; and
forming an active layer on the second dielectric layer.

### Claim 11 (depends on 10)

The method according to claim 10, wherein forming the light shielding layer and the first dielectric layer on the substrate comprises forming the light shielding layer on the substrate, and forming the first dielectric layer on the light shielding layer and the substrate.

### Claim 12 (depends on 11)

The method according claim 11, further comprising forming a light blocking portion in the same layer as the light shielding layer and spaced apart from the light shielding layer on the substrate, wherein the first dielectric layer covers the light shielding layer and the light blocking portion.

### Claim 13 (depends on 12)

The method according to claim 12, wherein a material of the light blocking portion is the same as a material of the light shielding layer.

### Claim 14 (depends on 10)

The method according to claim 10, wherein forming the light shielding layer and the first dielectric layer on the substrate comprises forming the first dielectric layer on the substrate, and forming the light shielding layer on the first dielectric layer.

### Claim 15 (depends on 10)

The method according to claim 10, further comprising:
forming a gate stack on the active layer, wherein the active layer comprises a channel region located under the gate stack and source/drain regions respectively located on both sides of the channel region, and wherein the gate stack comprises a gate insulating layer and a gate located on the gate insulating layer;
forming an interlayer insulating layer to cover the second dielectric layer, the active layer, and the gate stack;
patterning the interlayer insulating layer to simultaneously form vias exposing the source/drain regions in the interlayer insulating layer;
forming a conductive layer on the interlayer insulating layer to fill the vias;
patterning the conductive layer to form source/drain electrodes connected to the source/drain regions through the vias; and
forming a passivation layer on the interlayer insulating layer and the source/drain electrodes.

### Claim 16 (depends on 1)

A display panel comprising the thin film transistor according to claim 1.

### Claim 17 (depends on 16)

A display device comprising the display panel according to claim 16.

### Claim 18 (depends on 2)

A display panel comprising the thin film transistor according to claim 2.

### Claim 19 (depends on 3)

A display panel comprising the thin film transistor according to claim 3.

### Claim 20 (depends on 4)

A display panel comprising the thin film transistor according to claim 4.