# US 2019/0378902 A1 · Semiconductor devices and methods for forming the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0378902 A1 - Document ID: US20190378902A1 - Status: Published application - Kind: A1 - Application number: 16/005,161 - Filed: 2018-06-11 - Published: 2019-12-12 - Earliest claimed: 2018-06-11 - Assignees: Vanguard International Semiconductor Corporation - Applicants: Vanguard International Semiconductor Corporation - Inventors: Tsung-Yeh CHEN; Sheng-Wei FU; Chung-Yeh LEE - Web page: https://patentgrep.com/patent/US20190378902A1 ## CPC - H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates} - H10D 30/0295: {using recessing of the source electrodes} - H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes} - H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors} - H10D 64/117: {Recessed field plates, e.g. trench field plates or buried field plates} - H10D 64/514: {characterised by the insulating layers} - H10D 64/518: {characterised by their lengths or sectional shapes} - H10D 64/519: {characterised by their top-view geometrical layouts} - H10D 64/516: {the thicknesses being non-uniform} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A semiconductor device and methods for forming the same are provided. The method includes providing a substrate having a first conductive type, forming an epitaxial layer having the first conductive type on the substrate, forming a trench in the epitaxial layer, forming a first insulating layer in the trench and on the top surface of the epitaxial layer, forming a shield electrode and a mask layer on the first insulating layer in order, using the mask layer to remove a portion of the first insulating layer, wherein the top surface of the first insulating layer is higher than the top surface of the shield electrode after removing the portion of the first insulating layer, removing the mask layer, forming a second insulating layer on the first insulating layer and the shield electrode, and forming a gate electrode on the second insulating layer. ## Claims ### Claim 1 A method for forming a semiconductor device, comprising: providing a substrate having a first conductive type; forming an epitaxial layer having the first conductive type on the substrate; forming a trench in the epitaxial layer; forming a first insulating layer in the trench and on a top surface of the epitaxial layer; forming a shield electrode and a mask layer on the first insulating layer in order; using the mask layer to remove a portion of the first insulating layer, wherein a top surface of the first insulating layer is higher than a top surface of the shield electrode after removing the portion of the first insulating layer; removing the mask layer; forming a second insulating layer on the first insulating layer and the shield electrode; forming a gate electrode on the second insulating layer; forming a well region having a second conductive type in the epitaxial layer, wherein the second conductive type is different from the first conductive type; and forming a heavily doped region having the first conductive type in the well region. ### Claim 2 (depends on 1) The method of claim 1, wherein forming the shield electrode and the mask layer comprises: filling the shield electrode in the lower portion of the trench; forming a mask material layer on the shield electrode, wherein the mask material layer completely fills the trench; and removing a portion of the mask material layer to form the mask layer, and a remaining space of the trench is kept on the mask layer. ### Claim 3 (depends on 1) The method of claim 1, wherein the thickness of the mask layer is smaller than the thickness of the shield electrode. ### Claim 4 (depends on 1) The method of claim 1, wherein the epitaxial layer in the trench is exposed after removing the portion of the first insulating layer. ### Claim 5 (depends on 1) The method of claim 1, wherein the portion of the first insulating layer includes a portion of the first insulating layer on the top surface of the epitaxial layer and an upper portion of the first insulating layer in the trench. ### Claim 6 (depends on 1) The method of claim 1, wherein the shield electrode and the mask layer are surrounded by the first insulating layer. ### Claim 7 (depends on 1) The method of claim 1, wherein the second insulating layer forms a U-shaped upper surface on the first insulating layer and the shield electrode. ### Claim 8 (depends on 1) The method of claim 1, wherein the second insulating layer forms a stepped upper surface on the first insulating layer and the shield electrode, and a first portion of the second insulating layer on the first insulating layer is higher than a second portion of the second insulating layer on the shield electrode. ### Claim 9 (depends on 1) The method of claim 1, wherein the thickness of the first insulating layer is greater than the thickness of the second insulating layer. ### Claim 10 (depends on 1) The method of claim 1, further comprising: forming a third insulating layer on the gate electrode; and forming a first metal layer and a second metal layer on the third insulating layer, wherein the first metal layer is electrically connected to the heavily doped region, and the second metal layer is electrically connected to the gate electrode and the shield electrode. ### Claim 11 A semiconductor device, comprising: a substrate having a first conductive type; an epitaxial layer having the first conductive type disposed on the substrate, and a trench is in the epitaxial layer; a well region disposed on the epitaxial layer and having a second conductive type that is different from the first conductive type; a heavily doped region disposed on the well region and having the first conductive type; a shield electrode disposed in the trench, wherein the shield electrode is separated from the epitaxial layer by a first insulating layer, and the top surface of the first insulating layer is higher than the top surface of the shield electrode; and a gate electrode disposed in the trench and over the shield electrode, wherein the gate electrode is separated from the epitaxial layer and the shield electrode by a second insulating layer, wherein the second insulating layer forms a stepped upper surface on the first insulating layer and the shield electrode, and the gate electrode has a stepped bottom surface in contact with the stepped upper surface of the second insulating layer, and the stepped upper surface of the second insulating layer has a curved middle portion vertically overlapped with the shield electrode. ### Claim 12 (canceled) ### Claim 13 (depends on 11) The semiconductor device of claim 11, wherein the first portion of the second insulating layer on the first insulating layer is higher than the second portion of the second insulating layer on the shield electrode. ### Claim 14 (depends on 11) The semiconductor device of claim 11, wherein the thickness of the first insulating layer is greater than the thickness of the second insulating layer. ### Claim 15 (depends on 11) The semiconductor device of claim 11, further comprising: a third insulating layer disposed on the gate electrode; and a first metal layer and a second metal layer disposed on the third insulating layer, wherein the first metal layer is electrically connected to the heavily doped region, and the second metal layer is electrically connected to the gate electrode and the shield electrode. ### Claim 16 (depends on 11) The semiconductor device of claim 11, wherein the shield electrode is surrounded by the first insulating layer. ### Claim 17 (depends on 11) The semiconductor device of claim 11, wherein the gate electrode is surrounded by the second insulating layer. ### Claim 18 (depends on 11) The semiconductor device of claim 11, wherein an upper portion of the trench is surrounded by the well region and the heavily doped region. ### Claim 19 (depends on 11) The semiconductor device of claim 11, wherein the material of the second insulating layer is different from that of the first insulating layer. ### Claim 20 (depends on 11) The semiconductor device of claim 11, wherein the material of the gate electrode is different from that of the shield electrode. ### Claim 21 (depends on 11) The semiconductor device of claim 11, wherein a lowest portion of the curved middle portion is lower than a topmost surface of the first insulating layer.