# US 2019/0378831 A1 · Semiconductor device

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- Number: US 2019/0378831 A1
- Document ID: US20190378831A1
- Status: Published application
- Kind: A1
- Application number: 16/544,101
- Filed: 2019-08-19
- Published: 2019-12-12
- Earliest claimed: 2014-08-18
- Assignees: Renesas Electronics Corporation
- Applicants: Renesas Electronics Corporation
- Inventors: Takeshi OKAGAKI; Koji SHIBUTANI; Makoto YABUUCHI; Nobuhiro TSUDA
- Web page: https://patentgrep.com/patent/US20190378831A1

## CPC

- H10D 89/10: Integrated device layouts
- G06F 30/394: Routing (G06F30/396 takes precedence)
- H10D 30/62: Fin field-effect transistors [FinFET]
- H10D 84/853: {comprising FinFETs}
- H10D 30/6219: {characterised by the source or drain electrodes}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

An area of a semiconductor device having a FINFET can be reduced. The drain regions of an n-channel FINFET and a p-channel FINFET are extracted by two second local interconnects from a second Y gird between a gate electrode and a dummy gate adjacent thereto, to a third Y grid adjacent to the second Y gird. These second local interconnects are connected by a first local interconnect extending in the X direction in the third Y grid. According to such a cell layout, although the number of grids is increased by one because of the arrangement of the first local interconnect, the length in the X direction can be reduced. As a result, the cell area of the unit cell can be reduced while a space between the first and second local interconnects is secured.

## Claims

### Claim 1

A semiconductor device comprising:
a rectangular parallelepiped first fin extending in a first direction;
a rectangular parallelepiped second fin arranged to be separated from the first fin and extending in the first direction;
a gate electrode arranged on the first fin and the second fin through a gate insulating film and extending in a second direction crossing the first direction;
a first electrode of a first transistor formed in the first fin positioned on one side of the gate electrode; and
a second electrode of the first transistor formed in the first fin positioned on the other side of the gate electrode.