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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYun-Tai SHIH, Kuan-Ming PAN, Jeng-Hao LIN, I-Shi WANG, Jui-Mu CHO, Ching-Hou SU, Chyi-Tsong NI, Wun-Kai TSAI
Estimating the term…
An apparatus includes an alignment module configured to align a first wafer and a second wafer based on alignment markers on the first wafer and corresponding alignment markers on the second wafer. The apparatus further includes a flag placement module configured to insert a plurality of flags between the first wafer and the second wafer, a flag-out mechanism configured to simultaneously move the plurality of flags to a flag-out position, and a controller configured to determine whether the wafers remain aligned within an alignment tolerance based on an amount of time for each flag of the plurality of flags to reach the flag-out position.
An apparatus, comprising:
An apparatus, comprising:
The apparatus of claim 11, further comprising sensors configured to detect data related to a flag-out condition of the plurality of flags, and at least one processor configured to receive data from the sensors, to calculate at least one value related to flag-out timing, and to drive a display indicating an alignment status of the at least two wafers.
The apparatus of claim 12, wherein the processor is configured to trigger an audible alert indicating the flag-out condition of the plurality of flags.
An apparatus, comprising:
Dependencies are inferred from the claim text.