# US 2019/0378784 A1 · Semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0378784 A1 - Document ID: US20190378784A1 - Status: Published application - Kind: A1 - Application number: 16/429,555 - Filed: 2019-06-03 - Published: 2019-12-12 - Earliest claimed: 2018-06-07 - Assignees: Rohm Co., Ltd. - Applicants: Rohm Co., Ltd. - Inventors: Yoshio Higashida; Katsutoki Shirai - Web page: https://patentgrep.com/patent/US20190378784A1 ## CPC - H10W 70/429: {being the outer leads} - H10W 70/468: {Circuit boards} - H10W 20/42: Vias, e.g. via plugs - H10W 20/43: Layouts of interconnections - H10W 20/435: {Cross-sectional shapes or dispositions of interconnections} - H10W 70/417: {Bonding materials between chips and die pads} - H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00} - H10W 72/50: Bond wires - H10W 72/90: Bond pads, in general - H10W 74/111: {the semiconductor body being completely enclosed} - H10W 90/811: {Multiple chips on leadframes} - H10W 72/07552: {changes in structures or sizes} - H10W 72/07554: {changes in dispositions} - H10W 72/325: {Die-attach connectors having a filler embedded in a matrix} - H10W 72/351: {Materials of die-attach connectors} - H10W 72/352: {comprising metals or metalloids, e.g. solders} - H10W 72/353: {not comprising solid metals or solid metalloids, e.g. ceramics} - H10W 72/527: {Multiple bond wires having different sizes} - H10W 72/536: {the connected ends being ball-shaped} - H10W 72/5363: {the connected ends being wedge-shaped} - H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements} - H10W 72/5449: {not being orthogonal to a side surface of the chip, e.g. fan-out arrangements} - H10W 72/5453: {connecting between multiple bond pads on a chip, e.g. daisy chain} - H10W 72/5473: {multiple bond wires connected to a common bond pad} - H10W 72/5522: {comprising gold [Au]} - H10W 72/5524: {comprising aluminium [Al]} - H10W 72/5525: {comprising copper [Cu]} - H10W 72/59: Bond pads specially adapted therefor - H10W 72/884: {Die-attach connectors and bond wires} - H10W 72/932: {Plan-view shape, i.e. in top view} - H10W 72/9445: {Top-view layouts, e.g. mirror arrays} - H10W 72/951: {Materials of bond pads} - H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor device includes a semiconductor element made up of a semiconductor substrate, an element electrode formed on the substrate, and a wiring layer electrically connected to the element electrode. The semiconductor device further includes a lead frame supporting the semiconductor element, a first conductive member electrically connecting the semiconductor element and the lead frame, a second conductive member overlapping with the semiconductor element as seen in plan view, and a sealing resin covering the semiconductor element, a part of the lead frame, and the first and second conductive member. The wiring layer includes a first pad portion and a second pad portion. The second conductive member has a first connecting portion bonded to the first pad portion and a second connecting portion bonded to the second pad portion. ## Claims ### Claim 1 A semiconductor device comprising: a semiconductor element that includes a semiconductor substrate, an element electrode and a wiring layer, the semiconductor substrate having a substrate main surface and a substrate rear surface that are spaced apart from each other in a first direction, the element electrode being formed on the substrate main surface, the wiring layer being formed on the substrate main surface and electrically connected to the element electrode; a lead frame supporting the semiconductor element; a first conductive member electrically connecting the semiconductor element and the lead frame; a second conductive member overlapping with the semiconductor element as viewed in the first direction; and a sealing resin covering the semiconductor element, apart of the lead frame, the first conductive member and the second conductive member, wherein the wiring layer includes a first pad portion and a second pad portion that are spaced apart from each other, and the second conductive member has a first connecting portion bonded to the first pad portion and a second connecting portion bonded to the second pad portion. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the first conductive member and the second conductive member are spaced apart from each other as viewed in the first direction, and the second conductive member does not cross an outer edge of the semiconductor element as viewed in the first direction. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the wiring layer comprises a third pad portion spaced apart from the first pad portion and the first pad portion, and the first conductive member has a third connecting portion bonded to the third pad portion and a fourth connecting portion bonded to the lead frame. ### Claim 4 (depends on 3) The semiconductor device according to claim 3, wherein the semiconductor element includes a protective layer formed on the wiring layer, and the first pad portion, the second pad portion and the third pad portion are exposed from the protective layer. ### Claim 5 (depends on 4) The semiconductor device according to claim 4, wherein the wiring layer includes at least a first conductive layer and a second conductive layer that are spaced apart from each other in the first direction, and the semiconductor element includes: an interlayer insulating film that insulate the first and second conductive layers from each other; and a plurality of vias formed through the interlayer insulating film and electrically connecting the first and second conductive layers to each other. ### Claim 6 (depends on 5) The semiconductor device according to claim 5, wherein the first conductive layer is covered by the protective layer and provided with the first pad portion, the second pad portion and the third pad portion, and the second conductive layer is located closer in the first direction to the substrate main surface than the first conductive layer is. ### Claim 7 (depends on 6) The semiconductor device according to claim 6, wherein the first conductive layer includes a plurality of first plate-like members each being rectangular as viewed in the first direction, and one of the first plate-like members is provided with the first pad portion and the second pad portion. ### Claim 8 (depends on 7) The semiconductor device according to claim 7, wherein the second conductive layer includes a plurality of second plate-like members each being rectangular as viewed in the first direction, and the number of the first plate-like members is smaller than the number of the second plate-like members. ### Claim 9 (depends on 8) The semiconductor device according to claim 8, wherein the first plate-like members are perpendicular to the second plate-like members. ### Claim 10 (depends on 9) The semiconductor device according to claim 9, wherein the wiring layer includes a third conductive layer located closer in the first direction to the substrate main surface than the second conductive layer is. ### Claim 11 (depends on 10) The semiconductor device according to claim 10, wherein the third conductive layer includes a plurality of third plate-like members each being rectangular as viewed in the first direction, and the number of the second plate-like members is smaller than the third plate-like members. ### Claim 12 (depends on 11) The semiconductor device according to claim 11, wherein the third plate-like members are perpendicular to the second plate-like members. ### Claim 13 (depends on 7) The semiconductor device according to claim 7, wherein the element electrode includes at least a first electrode and a second electrode, and the first plate-like members include a first electrode conducting member electrically connected to the first electrode and a second electrode conducting member electrically connected to the second electrode. ### Claim 14 (depends on 1) The semiconductor device according to claim 1, wherein the second conductive member comprises a wire having a circular cross section. ### Claim 15 (depends on 14) The semiconductor device according to claim 14, wherein the first conductive member comprises a wire having a circular cross section, and the first conductive member and the second conductive member have a same diameter. ### Claim 16 (depends on 1) The semiconductor device according to claim 1, wherein the first conductive member and the second conductive member contain aluminum. ### Claim 17 (depends on 1) The semiconductor device according to claim 1, wherein the semiconductor element comprises a MOSFET. ### Claim 18 (depends on 1) The semiconductor device according to claim 1, further comprising: a control IC for controlling operation of the semiconductor element; and a third conductive member connecting the control IC and the lead frame. ### Claim 19 (depends on 18) The semiconductor device according to claim 18, wherein the third conductive member is thinner than the first conductive member. ### Claim 20 A semiconductor device comprising: a semiconductor element including a semiconductor substrate, an element electrode and a wiring layer, the semiconductor substrate having a substrate main surface and a substrate rear surface that are spaced apart from each other in a first direction, the element electrode being formed on the substrate main surface, the wiring layer being formed on the substrate main surface and electrically connected to the element electrode; a lead frame supporting the semiconductor element; a conductive member electrically connecting the semiconductor element and the lead frame; and a sealing resin covering the semiconductor element, apart of the lead frame and the conductive member, wherein the wiring layer includes a rectangular plate-like member elongated in a second direction perpendicular to the first direction, the conductive member has a connecting portion bonded to the plate-like member, the connecting portion being elongated in a longitudinal direction of the plate-like member as viewed in the first direction and overlapping with a longitudinal center of the plat-like member as viewed in the first direction.