# US 2019/0377705 A1 · Image processor i/o unit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0377705 A1 - Document ID: US20190377705A1 - Status: Published application - Kind: A1 - Application number: 16/547,487 - Filed: 2019-08-21 - Published: 2019-12-12 - Earliest claimed: 2017-05-15 - Assignees: Google Inc. - Applicants: Google LLC - Inventors: Asif Khan; Jason Redgrave; Neeti Desai; David Warren - Web page: https://patentgrep.com/patent/US20190377705A1 ## CPC - G06F 15/78: comprising a single central processing unit - G06F 15/7867: {with reconfigurable architecture} - G06T 1/20: Processor architectures; Processor configuration, e.g. pipelining - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL ## Abstract An image processor is described. The image processor includes a storage circuit to store segments of input image data received in a raster scan format. The image processor further includes a reformatting circuit to convert the segments of input image data into a block image format. The image processor further includes a processor comprising a two-dimensional execution lane array and a two-dimensional shift register array. The two-dimensional shift register array is to store the input image data that has been formatted into the block image format. The execution lane array is to execute instructions that operate on the image data from the two-dimensional shift register array. ## Claims ### Claim 1 An image processor, comprising: an I/O unit comprising: a storage circuit configured to store segments of input image data received in a raster scan format, the storage circuit comprising multiple buffers, and a reformatting circuit configured to convert the segments of input image data stored in one or more of the multiple buffers into a block image format, wherein upon a block of image data becoming available in a particular buffer of the multiple buffers, the I/O unit is configured to forward segments of image data in the particular buffer in column ordering while filling a row of segments in the particular buffer in row ordering, a processor comprising a two-dimensional execution lane array and a two-dimensional shift-register array, wherein the two-dimensional shift-register array is configured to store the input image data that has been formatted into the block image format, and wherein the execution lane array is configured to execute instructions that operate on the image data from the two-dimensional shift-register array. ### Claim 2 (depends on 1) The image processor of claim 1, wherein the reformatting circuit comprises register space that stores pointers referencing respective locations within the storage circuit. ### Claim 3 (depends on 2) The image processor of claim 2, wherein the pointers are organized in the register space to have a first dimension that corresponds to a row width of the raster scan format and to have a second dimension that corresponds to a pixel height of the block format. ### Claim 4 (depends on 1) The image processor of claim 1, wherein a first rate at which image segments are written into the storage circuit is approximately equal to a second rate at which image segments are received. ### Claim 5 (depends on 1) The image processor of claim 1, wherein after the reformatting circuit reads a first segment of a last row of a first buffer of the multiple buffers, the image processor is configured to store a next image segment in a first row of a different second buffer of the multiple buffers. ### Claim 6 (depends on 1) The image processor of claim 1, wherein the I/O unit is configured to support a plurality of input image streams. ### Claim 7 (depends on 6) The image processor of claim 6, wherein the storage circuit comprises a shared storage pool that stores image segments from multiple input image streams. ### Claim 8 (depends on 7) The image processor of claim 7, wherein the reformatting circuit is configured to track pointer values in an internal register space for each of the input image streams. ### Claim 9 A method performed by an image processor comprising an I/O unit comprising a storage circuit configured to store segments of input image data received in a raster scan format, the storage circuit comprising multiple buffers, and a reformatting circuit configured to convert the segments of input image data stored in one or more of the multiple buffers into a block image format, the method comprising: determining that a block of image data became available in a particular buffer of the multiple buffers; and in response, forwarding segments of image data in the particular buffer in column ordering while filling a row of segments in the particular buffer in row ordering. ### Claim 10 (depends on 9) The method of claim 9, wherein the reformatting circuit comprises register space and further comprising storing, by the reformatting circuit in the register space, pointers referencing respective locations within the storage circuit. ### Claim 11 (depends on 10) The method of claim 10, wherein the pointers are organized in the register space to have a first dimension that corresponds to a row width of the raster scan format and to have a second dimension that corresponds to a pixel height of the block format. ### Claim 12 (depends on 9) The method of claim 9, wherein a first rate at which image segments are written into the storage circuit is approximately equal to a second rate at which image segments are received. ### Claim 13 (depends on 9) The method of claim 9, further comprising: after the reformatting circuit reads a first segment of a last row of a first buffer of the multiple buffers, storing a next image segment in a first row of a different second buffer of the multiple buffers. ### Claim 14 (depends on 9) The method of claim 9, wherein the I/O unit is configured to support a plurality of input image streams. ### Claim 15 (depends on 14) The method of claim 14, wherein the storage circuit comprises a shared storage pool that stores image segments from multiple input image streams. ### Claim 16 (depends on 15) The method of claim 15, further comprising tracking, by the reformatting circuit, pointer values in an internal register space for each of the input image streams.