# US 2019/0377375 A1 · Power supply circuit and related methods for generating a power supply voltage in a semicondutor package > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0377375 A1 - Document ID: US20190377375A1 - Status: Published application - Kind: A1 - Application number: 16/550,513 - Filed: 2019-08-26 - Published: 2019-12-12 - Earliest claimed: 2017-09-01 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Hee-Won Kang; In-Hyuk Go; Nam-Su Kim; Eun-Ji Moon; Jae-Sang YUN - Web page: https://patentgrep.com/patent/US20190377375A1 ## CPC - G05F 1/465: {Internal voltage generators for integrated circuits, e.g. step down generators} - G05F 1/462: {as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic} - G05F 1/565: sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor (G05F1/563 takes precedence) - G11C 5/14: Power supply arrangements {, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels} - G11C 5/143: {Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels (G11C5/148 takes precedence); Switching between alternative supplies (G11C5/141 takes precedence)} - G11C 5/147: {Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence)} - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 70/611: {for connecting multiple chips together} - H10W 90/00: Package configurations - G11C 16/30: Power supply circuits - H10W 70/63: Vias, e.g. via plugs - H10W 70/656: Fan-in layouts - H10W 70/685: comprising multiple insulating layers - H10W 72/07553: {changes in shapes} - H10W 72/354: {comprising polymers} - H10W 72/537: {Multiple bond wires having different shapes} - H10W 72/59: Bond pads specially adapted therefor - H10W 72/884: {Die-attach connectors and bond wires} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 74/117: {the substrate having spherical bumps for external connection} - H10W 90/24: at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape - H10W 90/291: {characterised by containers, encapsulations, or other housings for the stacked chips} - H10W 90/732: {between stacked chips} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/752: {between stacked chips} - H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL} - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES - G11C: STATIC STORES (semiconductor memory devices H10B) - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A power supply circuit includes a first comparator, a second comparator, a first voltage regulator, an output terminal, a first path and a second path. The first comparator compares a first input voltage with a first reference voltage to generate a first control signal. The second comparator compares a second input voltage with the first reference voltage to generate a second control signal. A voltage level of the second input voltage is different from a voltage level of the first input voltage. The first voltage regulator is selectively enabled based on the first control signal and the second control signal, and generates a first voltage based on the first input voltage. A voltage level of the first voltage is substantially the same as the voltage level of the second input voltage. The output terminal is configured to output one of the second input voltage and the first voltage as a power supply voltage. The first path directly provides the first input voltage to the first voltage regulator. The second path directly provides the second input voltage to the output terminal. The second input voltage bypasses the first voltage. ## Claims ### Claim 1 A power supply circuit comprising: a first comparator configured to compare a first input voltage with a first reference voltage to generate a first control signal; a second comparator configured to compare a second input voltage with the first reference voltage to generate a second control signal, wherein a voltage level of the second input voltage is different from a voltage level of the first input voltage; a first voltage regulator configured to be selectively enabled based on the first control signal and the second control signal, and configured to generate a first voltage based on the first input voltage, wherein the voltage level of the first voltage is substantially same as the voltage level of the second input voltage; an output terminal configured to output one of the second input voltage or the first voltage from the first voltage regulator as a power supply voltage; a first path configured to directly provide the first input voltage to the first voltage regulator; and a second path configured to directly provide the second input voltage to the output terminal, the second input voltage bypassing the first voltage regulator. ### Claim 2 (depends on 1) The power supply circuit of claim 1, wherein when the second input voltage is received at the second comparator and when the first input voltage is not received at the first comparator, the first voltage regulator is disabled, and the second input voltage is output as the power supply voltage via the second path to the output terminal, and wherein when the first input voltage is received at the first comparator and when the second input voltage is not received at the second comparator, the first voltage regulator is enabled and is configured to generate the first voltage based on the first input voltage provided via the first path, and the first voltage is output as the power supply voltage to the output terminal. ### Claim 3 (depends on 2) The power supply circuit of claim 2, wherein when both the first input voltage and the second input voltage are received respectively at the first comparator and the second comparator, the first voltage regulator is disabled, and the second input voltage is output as the power supply voltage via the second path to the output terminal. ### Claim 4 (depends on 2) The power supply circuit of claim 2, wherein when both the first input voltage and the second input voltage are received respectively at the first comparator and the second comparator, the first voltage regulator is enabled and is configured to generate the first voltage based on the first input voltage provided via the first path, and the first voltage is output as the power supply voltage to the output terminal. ### Claim 5 (depends on 2) The power supply circuit of claim 2, wherein the voltage level of the second input voltage and the voltage level of the first voltage are lower than the voltage level of the first input voltage. ### Claim 6 (depends on 5) The power supply circuit of claim 5, wherein a voltage level of the first reference voltage is lower than the voltage level of the first input voltage and is higher than the voltage level of the second input voltage. ### Claim 7 (depends on 5) The power supply circuit of claim 5, wherein the first voltage regulator is a low dropout (LDO) regulator. ### Claim 8 (depends on 1) The power supply circuit of claim 1, wherein the first input voltage comprises a Universal Flash Storage (UFS) 2.0 power supply voltage and the second input voltage comprises a UFS 3.0 power supply voltage. ### Claim 9 (depends on 1) The power supply circuit of claim 1, further comprising: a reference voltage generator configured to generate the first reference voltage. ### Claim 10 (depends on 1) The power supply circuit of claim 1, further comprising: a first input terminal configured to receive the first input voltage; and a second input terminal configured to receive the second input voltage. ### Claim 11 (depends on 1) The power supply circuit of claim 1, further comprising: a third comparator configured to compare the second input voltage with a second reference voltage to generate a third control signal; a fourth comparator configured to compare a third input voltage with the second reference voltage to generate a fourth control signal, wherein a voltage level of the third input voltage is different from the voltage level of the first input voltage and the voltage level of the second input voltage; a second voltage regulator configured to be selectively enabled based on the third control signal and the fourth control signal, and configured to generate a second voltage based on the third input voltage, wherein a voltage level of the second voltage is substantially same as the voltage level of the second input voltage; and a third path configured to directly provide the third input voltage to the second voltage regulator. ### Claim 12 (depends on 11) The power supply circuit of claim 11, wherein the output terminal is configured to output one of the second input voltage, the first voltage from the first voltage regulator or the second voltage from the second voltage regulator as the power supply voltage. ### Claim 13 (depends on 11) The power supply circuit of claim 11, further comprising: a reference voltage generator configured to generate the first reference voltage and the second reference voltage. ### Claim 14 (depends on 11) The power supply circuit of claim 11, further comprising: a first input terminal configured to receive the first input voltage; a second input terminal configured to receive the second input voltage; and a third input terminal configured to receive the third input voltage. ### Claim 15 A method of generating a power supply voltage, the method comprising: determining whether at least one of a first input voltage and/or a second input voltage are received, wherein a voltage level of the second input voltage is different from a voltage level of the first input voltage; when the first input voltage is received, outputting a first voltage as the power supply voltage to an output terminal by enabling a first path and a first voltage regulator and by generating the first voltage based on the first input voltage, wherein the first path is configured to directly provide the first input voltage to the first voltage regulator, and wherein a voltage level of the first voltage is substantially same as the voltage level of the second input voltage; and when the second input voltage is received, outputting the second input voltage as the power supply voltage to the output terminal by disabling the first voltage regulator and by enabling a second path, wherein the second path is configured to directly provide the second input voltage to the output terminal, and wherein the second input voltage bypasses the first voltage regulator. ### Claim 16 (depends on 15) The method of claim 15, further comprising: when both the first input voltage and the second input voltage are received, outputting the second input voltage as the power supply voltage to the output terminal by disabling the first voltage regulator and by enabling the second path. ### Claim 17 (depends on 15) The method of claim 15, further comprising: when both the first input voltage and the second input voltage are received, outputting the first voltage as the power supply voltage via the output terminal by enabling the first path and the first voltage regulator and by generating the first voltage using the first voltage regulator. ### Claim 18 (depends on 15) The method of claim 15, wherein determining whether at least one of the first input voltage and/or the second input voltage are received comprises: first checking whether the second input voltage is received, and subsequently checking whether the first input voltage is received. ### Claim 19 (depends on 15) The method of claim 15, wherein determining whether at least one of the first input voltage and/or the second input voltage are received comprises: first checking whether the first input voltage is received, and subsequently checking whether the second input voltage is received. ### Claim 20 A power supply circuit comprising: a first input terminal configured to receive a first input voltage; a second input terminal configured to receive a second input voltage, wherein a voltage level of the second input voltage is different from a voltage level of the first input voltage; a reference voltage generator configured to generate a first reference voltage that is used to check whether the first input voltage and the second input voltage are received; a first comparator configured to compare the first input voltage with the first reference voltage to generate a first control signal representing whether the first input voltage is received; a second comparator configured to compare the second input voltage with the first reference voltage to generate a second control signal representing whether the second input voltage is received; a first voltage regulator configured to be selectively enabled based on the first control signal and the second control signal, and configured to generate a first voltage based on the first input voltage, wherein a voltage level of the first voltage is substantially same as the voltage level of the second input voltage; an output terminal configured to output one of the second input voltage or the first voltage from the first voltage regulator as a power supply voltage; a first path configured to directly connect the first input terminal receiving the first input voltage with the first voltage regulator, and configured to directly provide the first input voltage to the first voltage regulator; and a second path configured to directly connect the second input terminal receiving the second input voltage with the output terminal, and configured to directly provide the second input voltage to the output terminal, the second input voltage bypassing the first voltage regulator.