# US 2019/0377133 A1 · Method and structure providing optical isolation of a waveguide on a silicon-on-insulator substrate > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0377133 A1 - Document ID: US20190377133A1 - Status: Published application - Kind: A1 - Application number: 16/543,446 - Filed: 2019-08-16 - Published: 2019-12-12 - Earliest claimed: 2012-06-04 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Roy E. Meade - Web page: https://patentgrep.com/patent/US20190377133A1 ## CPC - G02B 6/136: by etching - G02B 6/122: Basic optical elements, e.g. light-guiding paths - H10P 90/1906: {Preparing SOI wafers} - H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations} - H10W 10/061: {using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations} - H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations - H10W 10/181: {Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers} - G02B 2006/12061: {Silicon} - H10D 86/01: Manufacture or treatment - G02B: OPTICAL ELEMENTS, SYSTEMS OR APPARATUS - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract Disclosed are a method and structure providing a silicon-on-insulator substrate on which photonic devices are formed and in which a core material of a waveguide is optically decoupled from a support substrate by a shallow trench isolation region. ## Claims ### Claim 1 A method of forming an integrated structure, the method comprising: forming a shallow trench isolation region in a first semiconductor substrate; filing a trench of the shallow trench isolation region with a first dielectric material having a first index of refraction; forming a waveguide on a second substrate, wherein the second substrate includes a second dielectric material, wherein the waveguide is formed of a semiconductor material over the second dielectric material, and wherein the second semiconductor material has a second index of refraction greater than the first index of refraction attaching the second substrate to the first semiconductor substrate, wherein the second dielectric material faces the first substrate and wherein the waveguide is located over the shallow trench isolation region. ### Claim 2 (depends on 1) The method according to claim 1, wherein the first dielectric material comprises a solid. ### Claim 3 (depends on 1) The method according to claim 1, wherein the first dielectric material comprises an oxide. ### Claim 4 (depends on 1) The method according to claim 1, wherein a combined thickness of the second dielectric material and the shallow trench isolation region is at least 1000 nm. ### Claim 5 (depends on 1) The method according to claim 1, wherein the first semiconductor substrate and the second substrate each comprises silicon. ### Claim 6 (depends on 1) The method according to claim 1, wherein the waveguide comprises a core region surrounded by a cladding region, the cladding region being formed at least in part by the second dielectric material. ### Claim 7 (depends on 6) The method according to claim 6, wherein the core region comprises silicon and the cladding region comprises silicon dioxide. ### Claim 8 (depends on 1) The method according to claim 1, further comprising forming an electronic circuit element in an area of the semiconductor material of the second substrate. ### Claim 9 (depends on 1) The method according to claim 1, wherein the first semiconductor substrate and the second substrate together form a silicon-on-insulator structure. ### Claim 10 (depends on 1) The method according to claim 1, further comprising disposing a third dielectric material over the semiconductor material of the second substrate. ### Claim 11 (depends on 10) The method according to claim 10, wherein the third dielectric material is part of an interlayer dielectric structure. ### Claim 12 A method of forming a silicon-on-insulator structure, the method comprising: forming a trench in a first semiconductor substrate; filing the trench with a first dielectric material having a first index of refraction to form a shallow trench isolation region; forming a waveguide on a second substrate, wherein the second substrate includes a second dielectric material, wherein the waveguide is formed of a semiconductor material over the second dielectric material, and wherein the second semiconductor material has a second index of refraction greater than the first index of refraction attaching the second substrate to the first semiconductor substrate, wherein the second dielectric material faces the first substrate and wherein the waveguide is aligned with the shallow trench isolation region. ### Claim 13 (depends on 12) The method according to claim 12, wherein the first dielectric material comprises a solid. ### Claim 14 (depends on 12) The method according to claim 12, wherein the first dielectric material comprises an oxide. ### Claim 15 (depends on 12) The method according to claim 12, wherein a combined thickness of the second dielectric material and the shallow trench isolation region is at least 1000 nm. ### Claim 16 (depends on 12) The method according to claim 12, wherein the first semiconductor substrate and the second substrate each comprises silicon. ### Claim 17 (depends on 12) The method according to claim 12, wherein the waveguide comprises a core region surrounded by a cladding region, the cladding region being formed at least in part by the second dielectric material. ### Claim 18 (depends on 17) The method according to claim 17, wherein the core region comprises silicon and the cladding region comprises silicon dioxide. ### Claim 19 (depends on 12) The method according to claim 12, further comprising forming an electronic circuit element in an area of the semiconductor material of the second substrate. ### Claim 20 (depends on 12) The method according to claim 12, further comprising disposing a third dielectric material over the semiconductor material of the second substrate. ### Claim 21 (depends on 20) The method according to claim 20, wherein the third dielectric material is part of an interlayer dielectric structure.