# US 2019/0376206 A1 · SiC EPITAXIAL WAFER AND METHOD FOR PRODUCING SAME

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- Number: US 2019/0376206 A1
- Document ID: US20190376206A1
- Status: Published application
- Kind: A1
- Application number: 16/476,412
- Filed: 2017-12-25
- Published: 2019-12-12
- Earliest claimed: 2017-01-10
- Assignees: Showa Denko K.K.; Central Research Institute of Electric Power Industry; Denso Corporation
- Applicants: Showa Denko K.K.; Central Research Institute of Electric Power Industry; Denso Corporation
- Inventors: Keisuke FUKADA; Naoto ISHIBASHI; Akira BANDO; Masahiko ITO; Isaho KAMATA; Hidekazu TSUCHIDA; Kazukuni HARA; Masami NAITO; Hideyuki UEHIGASHI; Hiroaki FUJIBAYASHI; Hirofumi AOKI; Toshikazu SUGIURA; Katsumi SUZUKI
- Web page: https://patentgrep.com/patent/US20190376206A1

## CPC

- C30B 25/205: {the substrate being of insulating material}
- H10P 14/2904: {Silicon carbide}
- C23C 16/42: Silicides
- C30B 25/165: {the flow of the reactive gases}
- C30B 25/183: {being provided with a buffer layer, e.g. a lattice matching layer}
- C30B 25/20: the substrate being of the same materials as the epitaxial layer
- C30B 29/06: Silicon
- C30B 29/36: Carbides
- H10P 14/24: using chemical vapour deposition [CVD]
- H10P 14/2926: {Crystal orientations}
- H10P 14/3208: {Silicon carbide}
- H10P 14/3408: {Silicon carbide}
- H10P 14/6334: {using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition (deposition by physical ablation of a target H10P14/6329)}
- H10P 14/6905: {being a silicon carbide or silicon carbonitride and not containing oxygen, e.g. SiC or SiC:H}
- C30B: SINGLE-CRYSTAL GROWTH (by using ultra-high pressure, e.g. for the formation of diamonds, B01J3/06); UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL (zone-refining of metals or alloys C22B); PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (casting of metals, casting of other substances by the same processes or devices B22D; working of plastics B29; modifying the physical structure of metals or alloys C21D, C22F); SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (for producing semiconductor devices or parts thereof H10); APPARATUS THEREFOR
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)

## Abstract

This SiC epitaxial wafer includes: a SiC single crystal substrate of which a main surface has an off-angle of 0.4° to 5° with respect to (0001) plane; and an epitaxial layer provided on the SiC single crystal substrate, wherein the epitaxial layer has a basal plane dislocation density of 0.1 pieces/cm2 or less that is a density of basal plane dislocations extending from the SiC single crystal substrate to an outer surface and an intrinsic 3C triangular defect density of 0.1 pieces/cm2 or less.

## Claims

### Claim 1

A SiC epitaxial wafer comprising:
a SiC single crystal substrate of which a main surface has an off-angle of 0.4° to 5° with respect to (0001) plane; and
an epitaxial layer provided on the SiC single crystal substrate,
wherein the epitaxial layer has a basal plane dislocation density of 0.1 pieces/cm2 or less that is a density of basal plane dislocations extending from the SiC single crystal substrate to an outer surface and an intrinsic 3C triangular defect density of 0.1 pieces/cm2 or less.

### Claim 2 (depends on 1)

The SiC epitaxial wafer according to claim 1,
wherein in the epitaxial layer, a basal plane dislocation density in a first region on the SiC single crystal substrate side is higher than a basal plane dislocation density in a second region on the outer surface side.

### Claim 3 (depends on 2)

The SiC epitaxial wafer according to claim 2,
wherein the SiC single crystal substrate and the epitaxial layer have the same conductivity type,
the epitaxial layer includes a buffer layer and a drift layer from the SiC single crystal substrate side in this order,
a carrier concentration of the buffer layer is higher than a carrier concentration of the drift layer, and
the buffer layer includes the first region.

### Claim 4 (depends on 2)

The SiC epitaxial wafer according to claim 2,
wherein a thickness of the first region is 1 μm or less.

### Claim 5 (depends on 1)

The SiC epitaxial wafer according to claim 1,
wherein a diameter of the SiC single crystal substrate is 150 mm or more.

### Claim 6 (depends on 1)

The SiC epitaxial wafer according to claim 1,
wherein a thickness of the epitaxial layer is 10 μm or more.

### Claim 7

A method for producing a SiC epitaxial wafer, comprising:
a step of crystal-growing an epitaxial layer on a SiC single crystal substrate of which a main surface has an off-angle of 0.4° to 5° with respect to (0001) plane,
wherein the step of crystal-growing an epitaxial layer includes:
a first step of epitaxially growing SiC on the SiC single crystal substrate while a growth rate is gradually increased from a first growth rate toward a second growth rate having a growth rate of 50 μm/h or more; and
a second step of epitaxially growing SiC at a growth rate of 50 μm/h or more.

### Claim 8 (depends on 7)

The method for producing a SiC epitaxial wafer according to claim 7,
wherein in the first step, an increase rate of the growth rate is 0.1 μm/(h·sec) to 2.0 μm/(h·sec).