Maximum likelihood sequence estimation circuit, receiving device, and maximum likelihood sequence estimation method

A maximum likelihood sequence estimation method for a maximum likelihood sequence estimation circuit, the method comprising:

• estimating a first reception sample signal that is a reception sample signal including a preceding wave component and a second reception sample signal that is a reception sample signal including a delayed wave component from a plurality of reception sample signals sampled from a reception signal at sample intervals shorter than symbol intervals;
• determining the number of taps for the symbol intervals such that the number of taps is equal to or larger than a sample interval between an arrival timing of a preceding wave estimated and an arrival timing of a delayed wave estimated;
• extracting both the first reception sample signals and the second reception sample signals from the plurality of reception sample signals at the symbol intervals;
• and
• estimating a maximum likelihood sequence using the first reception sample signals extracted and the second reception sample signals extracted based on the number of taps.

A maximum likelihood sequence estimation circuit comprising:

• a signal extractor to estimate a reception sample signal including a preceding wave component and a reception sample signal including a delayed wave component from a plurality of reception sample signals sampled from a reception signal at sample intervals shorter than symbol intervals, and to extract, based on an estimation result, both first reception sample signals and second reception sample signals from the plurality of reception sample signals at the symbol intervals;
• and
• a maximum likelihood sequence estimator to estimate a maximum likelihood sequence using the first reception sample signals extracted and the second reception sample signals extracted, wherein
• if timings of extracting the first reception sample signals overlap with timings of extracting the second reception sample signals, the signal extractor adds a fixed sample offset to a first beginning address that is a beginning address of the first reception sample signals or a second beginning address that is a beginning address of the second reception sample signals.