# US 2019/0356418 A1 · Method of transmitting data encoded in polar code and electronic device using the same

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- Number: US 2019/0356418 A1
- Document ID: US20190356418A1
- Status: Published application
- Kind: A1
- Application number: 16/226,672
- Filed: 2018-12-20
- Published: 2019-11-21
- Earliest claimed: 2018-05-17
- Assignees: Industrial Technology Research Institute
- Applicants: Industrial Technology Research Institute
- Inventors: Shin-Lin Shieh
- Web page: https://patentgrep.com/patent/US20190356418A1

## CPC

- H04L 1/0061: {Error detection codes}
- H03M 13/09: Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
- H03M 13/13: Linear codes
- H04L 1/00: Arrangements for detecting or preventing errors in the information received {(correcting synchronisation H04L7/00)}
- H04L 1/0041: {Arrangements at the transmitter end}
- H04W 72/0446: Resources in time domain, e.g. slots or frames
- H04W 72/0453: Resources in frequency domain, e.g. a carrier in FDMA
- H04W 72/23: in the downlink direction of a wireless link, i.e. towards a terminal
- H03M 13/033: {Theoretical methods to calculate these checking codes}
- H04L 1/0058: {Block-coded modulation}
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- H04W: WIRELESS COMMUNICATION NETWORKS (broadcast communication H04H; communication systems using wireless links for non-selective communication, e.g. wireless extensions H04M1/72)

## Abstract

The disclosure is directed to a method of transmitting data encoded in Polar Code and an electronic device using the same method. The data transmission method would include not limited to: determining a bit sequence for transmission; dividing the bit sequence into a first bit sequence and a second bit sequence; generating a first transmission bit stream encoded in Polar Code, ordered from most reliable to least reliable, and including the first bit sequence; generating a second transmission bit stream encoded in Polar Code, ordered from most reliable to least reliable, and including the second bit sequence, wherein the first transmission bit stream has the same length as the second transmission bit stream; transmitting the first transmission bit stream; and transmitting the second transmission bit stream.

## Claims

### Claim 1

A method of transmitting data encoded in Polar Code used by an electronic device, the method comprising:
determining a bit sequence for transmission;
dividing the bit sequence into a first bit sequence and a second bit sequence;
generating a first transmission bit stream encoded in Polar Code, ordered from most reliable to least reliable, and comprising the first bit sequence;
generating a second transmission bit stream encoded in Polar Code, ordered from most reliable to least reliable, and comprising the second bit sequence, wherein the first transmission bit stream has the same length as the second transmission bit stream;
transmitting the first transmission bit stream; and
transmitting the second transmission bit stream.

### Claim 2 (depends on 1)

The method of claim 1, wherein transmitting the first transmission bit stream occurs before transmitting the second transmission bit stream, and the first bit sequence is more critical than the second bit sequence.

### Claim 3 (depends on 2)

The method of claim 2, wherein the second transmission bit stream further comprising the first bit sequence which is located after the second bit sequence and before a second set of frozen bits.

### Claim 4 (depends on 2)

The method of claim 2, wherein the first transmission bit stream further comprising the second bit sequence which is located after the first bit sequence and before a first set of frozen bits.

### Claim 5 (depends on 1)

The method of claim 1, wherein transmitting the first transmission bit stream occurs after transmitting the second transmission bit stream, the second bit sequence is more critical than the first bit sequence, and the second transmission bit stream further comprising the first bit sequence which is located after the second bit sequence and before the second set of frozen bits.

### Claim 6 (depends on 4)

The method of claim 4, wherein the first transmission bit stream further comprising a first set of error correction bits which is used for checking the first bit sequence and is located between the first bit sequence and the first set of frozen bits.

### Claim 7 (depends on 6)

The method of claim 6, wherein the first transmission bit stream further comprising a second set of error correction bits which is used for checking the first bit sequence followed by the second bit sequence and is located after the second bit sequence and before the first set of frozen bits.

### Claim 8 (depends on 7)

The method of claim 7, wherein the second transmission bit stream further comprising a third set of error correction bits which is used for checking the second bit sequence and is located after the second bit sequence and before the second set of frozen bits.

### Claim 9 (depends on 8)

The method of claim 8, wherein the second transmission bit stream further comprising a fourth set of error correction bits which is used for checking the second bit sequence followed by the first bit sequence and is located after the first bit sequence and before the second set of frozen bits.

### Claim 10 (depends on 1)

The method of claim 1, wherein transmitting the first transmission bit stream occurs in a first frequency band and transmitting the second transmission bit stream occurs in another frequency band but the same time slot.

### Claim 11 (depends on 1)

The method of claim 1, wherein the first bit sequence has a different length from the second bit sequence.

### Claim 12

An electronic device comprising:
a transmitter; and
a processor coupled to the transmitter and configured at least to:
determine a bit sequence for transmission;
divide the bit sequence into a first bit sequence and a second bit sequence;
generate a first transmission bit stream encoded in Polar Code, ordered from most reliable to least reliable, and comprising the first bit sequence;
generate a second transmission bit stream encoded in Polar Code, ordered from most reliable to least reliable, and comprising the second bit sequence, wherein the first transmission bit stream has the same length as the second transmission bit stream;
transmit, by using the transmitter, the first transmission bit stream; and
transmit, by using the transmitter, the second transmission bit stream.

### Claim 13 (depends on 12)

The electronic device of claim 12, wherein the processor configured to transmit the first transmission bit stream occurs before transmit the second transmission bit stream, and first bit sequence is more critical than the second bit sequence.

### Claim 14 (depends on 13)

The electronic device of claim 13, wherein the second transmission bit stream further comprising the first bit sequence which is located after the second bit sequence and before a second set of frozen bits.

### Claim 15 (depends on 13)

The electronic device of claim 13, wherein the first transmission bit stream further comprising the second bit sequence which is located after the first bit sequence and before a first set of frozen bits.

### Claim 16 (depends on 12)

The electronic device of claim 12, wherein the processor configured to transmitting the first transmission bit stream occurs after transmitting the second transmission bit stream, the second bit sequence is more critical than the first bit sequence, and the second transmission bit stream further comprising the first bit sequence which is located after the second bit sequence and before the second set of frozen bits.

### Claim 17 (depends on 15)

The electronic device of claim 15, wherein the first transmission bit stream further comprising a first set of error correction bits which is used for checking the first bit sequence and is located between the first bit sequence and the first set of frozen bits.

### Claim 18 (depends on 17)

The electronic device of claim 17, wherein the first transmission bit stream further comprising a second set of error correction bits which is used for checking the first bit sequence followed by the second bit sequence and is located after the second bit sequence and before the first set of frozen bits.

### Claim 19 (depends on 18)

The electronic device of claim 18, wherein the second transmission bit stream further comprising a third set of error correction bits which is used for checking the second bit sequence and is located after the second bit sequence and before the second set of frozen bits.

### Claim 20 (depends on 19)

The electronic device of claim 19, wherein the second transmission bit stream further comprising a fourth set of error correction bits which is used for checking the second bit sequence followed by the first bit sequence and is located after the first bit sequence and before the second set of frozen bits.

### Claim 21 (depends on 12)

The electronic device of claim 12, wherein the processor is configured to transmit the first transmission bit stream occurs in a first frequency band and transmit the second transmission bit stream occurs in another frequency band but the same time slot.

### Claim 22 (depends on 12)

The electronic device of claim 12, wherein the first bit sequence has a different length from the second bit sequence.
