# US 2019/0356348 A1 · Compact broadband receiver for multi-band millimeter-wave 5g communication > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0356348 A1 - Document ID: US20190356348A1 - Status: Published application - Kind: A1 - Application number: 15/980,391 - Filed: 2018-05-15 - Published: 2019-11-21 - Earliest claimed: 2018-05-15 - Assignees: Speedlink Technology Inc. - Applicants: Speedlink Technology Inc. - Inventors: Huy Thong NGUYEN; Taiyun CHI; Min-Yu HUANG; Hua WANG; Thomas CHEN - Web page: https://patentgrep.com/patent/US20190356348A1 ## CPC - H04B 1/16: Circuits - H03D 7/1441: {using field-effect transistors (H03D7/145 takes precedence)} - H03D 7/1458: {Double balanced arrangements, i.e. where both input signals are differential} - H03F 1/223: {with MOSFET's} - H03F 1/565: {using inductive elements} - H03F 3/19: with semiconductor devices only - H03F 3/195: in integrated circuits - H04B 1/40: Circuits - H03F 2200/222: A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier - H03F 2200/294: the amplifier being a low noise amplifier [LNA] - H03F 2200/36: the amplifier comprising means for increasing the bandwidth - H03F 2200/451: the amplifier being a radio frequency amplifier - H03F 2200/534: Transformer coupled at the input of an amplifier - H03F 2200/541: Transformer coupled at the output of an amplifier - H03H 7/0115: {comprising only inductors and capacitors (H03H7/075, H03H7/09, H03H7/12, H03H7/13 take precedence)} - H03H 7/06: including resistors (H03H7/075, H03H7/09, H03H7/12, H03H7/13 take precedence) - H03H 7/175: {Series LC in series path (H03H7/1783 takes precedence)} - H03H 7/1775: {Parallel LC in shunt or branch path (H03H7/1791 takes precedence)} - H03H 2001/0078: {comprising spiral inductor on a substrate} - H04B: TRANSMISSION - H03D: DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER (masers, lasers H01S; circuits capable of acting both as modulator and demodulator H03C; details applicable to both modulators and frequency-changers H03C; demodulating pulses H03K9/00; transforming types of pulse modulation H03K11/00; coding, decoding or code conversion, in general H03M; repeater stations H04B7/14; demodulators adapted for AC systems of digital information transmission H04L27/00; synchronous demodulators adapted for colour television H04N9/66) - H03F: AMPLIFIERS - H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P) ## Abstract According to one embodiment, a compact broadband radio frequency (RF) receiver circuit includes a low noise amplifier which includes a first amplifier stage, a second amplifier stage, an inter-stage network including a higher order filter network, where the inter-stage network is coupled between the first amplifier stage and the second amplifier stage, and a double resonance transformer network coupled to an output of the second amplifier stage. The RF receiver circuit includes a low pass filter and a mixer circuit coupled between the low noise amplifier and the low pass filter. ## Claims ### Claim 1 A radio frequency (RF) receiver circuit, the RF receiver circuit comprising: a low noise amplifier comprising: a first amplifier stage, a second amplifier stage, an inter-stage network comprising a higher order filter network, wherein the inter-stage network is coupled between the first amplifier stage and the second amplifier stage, and a double resonance transformer network coupled to an output of the second amplifier stage; a low pass filter; and a mixer circuit coupled between the low noise amplifier and the low pass filter. ### Claim 2 (depends on 1) The RF receiver circuit of claim 1, wherein the higher order filter network of the inter-stage network includes a PI-shaped higher order filter network having an input node and an output node, wherein the input node is coupled to the first amplifier stage and the output node is coupled to the second amplifier stage. ### Claim 3 (depends on 2) The RF receiver circuit of claim 2, wherein the PI-shaped higher order filter network comprises: a first inductive transmission line coupled in between the input node and a first DC supply voltage source to resonate at a first LC resonance with a parasitic capacitance seen at an output of the first amplifier stage that is coupled to the input node; a second inductive transmission line coupled to the input node; a capacitor coupled, in series, between the second inductive transmission line and the output node to resonate at a second LC resonance with the second inductive transmission line; and a third inductive transmission line coupled to the output node to resonate at a third LC resonance with a parasitic capacitance seen at an input of the second amplifier stage coupled to the output node. ### Claim 4 (depends on 1) The RF receiver circuit of claim 1, wherein the double resonance transformer network includes: a double resonance transformer having a primary winding and a secondary winding, wherein the primary winding is in parallel with a parasitic capacitance of a device seen at an output of the second amplifier stage to resonate at a fourth resonance by an inductance of the primary winding and the parasitic capacitance; and a capacitor coupled in parallel with the secondary winding to resonate at a fifth resonance with an inductance of the secondary winding. ### Claim 5 (depends on 1) The RF receiver circuit of claim 1, wherein the mixer circuit comprises: a LO input stage; an RF input stage; an output stage including a passive resistor-capacitor network; and a mixer core having LO inputs, RF inputs, and IF outputs, wherein the mixer core is coupled in between the LO and RF input stages and the passive resistor-capacitor network of the output stage. ### Claim 6 (depends on 5) The RF receiver circuit of claim 5, wherein the LO input stage and the RF input stage each comprises a double resonance transformer. ### Claim 7 (depends on 5) The RF receiver circuit of claim 5, wherein the resistor-capacitor network of the output stage includes a first resistor coupled in parallel with a first capacitor, and a second resistor coupled in parallel with a second capacitor forming the resistance-capacitance network. ### Claim 8 (depends on 5) The RF receiver circuit of claim 5, wherein the mixer core comprises a first stage, a second stage, and inductive transmission lines coupled in between the first stage and the second stage to improve a conversion gain of the mixer circuit. ### Claim 9 (depends on 8) The RF receiver circuit of claim 8, wherein the first stage of the mixer core comprises a balanced pair of common source transistors, each common source transistor having a source terminal coupled to a degenerative inductance to enhance a linearity of the mixer circuit. ### Claim 10 (depends on 8) The RF receiver circuit of claim 8, wherein the second stage of the mixer core comprises two balanced pairs of common gate transistors, each common gate transistor pair being coupled to a drain terminal of the common source transistor pair via the inductive transmission lines. ### Claim 11 (depends on 5) The RF receiver circuit of claim 5, wherein the mixer core comprises: a first stage comprising a first differential transistor pair having a first and a second transistor, wherein a first gate terminal of the first transistor and a second gate terminal of the second transistor together are the RF inputs to receive a differential RF input signal to be mixed, wherein a first and a second source terminals of the first and the second transistors respectively are each coupled to a degenerative inductance to enhance a linearity of the mixer circuit; a second stage coupled to the first stage, wherein the second stage comprises a second differential transistor pair having a third transistor with a third gate and a third drain terminal and a fourth transistor with a fourth gate and a fourth drain terminal and a third differential transistor pair having a fifth transistor with a fifth gate and a fifth terminal and a sixth transistor with a sixth gate and a sixth drain terminal, wherein the third gate terminal is coupled to the sixth gate terminal and the fourth gate terminal is coupled to the fifth gate terminal, wherein the third gate terminal and the fourth gate terminal are the LO inputs to receive a differential LO drive signal to drive the mixer, wherein the third drain terminal is coupled to the sixth drain terminal and the fourth drain terminal is coupled to the fifth drain terminal, wherein the third drain terminal and the fourth drain terminal are the IF outputs of the mixer; and a pair of inductive transmission lines having a first inductive transmission line coupled in between a first drain terminal of the first transistor and source terminals of the third and fourth transistors, and a second transmission inductive line coupled in between a second drain terminal of the second transistor to source terminals of the fifth and sixth transistors. ### Claim 12 A RF frontend circuit comprising a RF receiver to amplifier a received signal, the RF receiver comprising: a low noise amplifier comprising: a first amplifier stage, a second amplifier stage, an inter-stage network comprising a higher order filter network, wherein the inter-stage network is coupled between the first amplifier stage and the second amplifier stage, and a double resonance transformer network coupled to an output of the second amplifier stage; a low pass filter; and a mixer circuit coupled between the low noise amplifier and the low pass filter. ### Claim 13 (depends on 12) The RF frontend circuit of claim 12, wherein the higher order filter network of the inter-stage network includes a PI-shaped higher order filter network having an input node and an output node, wherein the input node is coupled to the first amplifier stage and the output node is coupled to the second amplifier stage. ### Claim 14 (depends on 13) The RF frontend circuit of claim 13, wherein the PI-shaped higher order filter network comprises: a first inductive transmission line coupled in between the input node and a first DC supply voltage source to resonate at a first LC resonance with a parasitic capacitance seen at an output of the first amplifier stage that is coupled to the input node; a second inductive transmission line coupled to the input node; a capacitor coupled, in series, between the second inductive transmission line and the output node to resonate at a second LC resonance with the second inductive transmission line; and a third inductive transmission line coupled to the output node to resonate at a third LC resonance with a parasitic capacitance seen at an input of the second amplifier stage coupled to the output node. ### Claim 15 (depends on 12) The RF frontend circuit of claim 12, wherein the double resonance transformer network includes: a double resonance transformer having a primary winding and a secondary winding, wherein the primary winding is in parallel with a parasitic capacitance of a device seen at an output of the second amplifier stage to resonate at a fourth resonance by an inductance of the primary winding and the parasitic capacitance; and a capacitor coupled in parallel with the secondary winding to resonate at a fifth resonance with an inductance of the secondary winding. ### Claim 16 (depends on 12) The RF frontend circuit of claim 12, wherein the mixer circuit comprises: a LO input stage; an RF input stage; an output stage including a passive resistor-capacitor network; and a mixer core having LO inputs, RF inputs, and IF outputs, wherein the mixer core is coupled in between the LO and RF input stages and the passive resistor-capacitor network of the output stage. ### Claim 17 (depends on 16) The RF frontend circuit of claim 16, wherein the LO input stage and the RF input stage each comprises a double resonance transformer. ### Claim 18 (depends on 16) The RF frontend circuit of claim 16, wherein the resistor-capacitor network of the output stage includes a first resistor coupled in parallel with a first capacitor, and a second resistor coupled in parallel with a second capacitor forming the resistance-capacitance network. ### Claim 19 (depends on 16) The RF frontend circuit of claim 16, wherein the mixer core comprises a first stage, a second stage, and inductor transmission lines coupled in between the first stage and the second stage to improve a conversion gain of the mixer circuit. ### Claim 20 (depends on 19) The RF frontend circuit of claim 19, wherein the first stage of the mixer core comprises a balanced pair of common source transistors, each common source transistor having a source terminal coupled to a degenerative inductance to enhance a linearity of the mixer circuit. ### Claim 21 (depends on 19) The RF frontend circuit of claim 19, wherein the second stage of the mixer core comprises two balanced pairs of common gate transistors, each common gate transistor pair being coupled to a drain terminal of the common source transistor pair via the inductive transmission lines.