# US 2019/0355773 A1 · Stacked Photodetector Assemblies > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0355773 A1 - Document ID: US20190355773A1 - Status: Published application - Kind: A1 - Application number: 16/283,730 - Filed: 2019-02-22 - Published: 2019-11-21 - Earliest claimed: 2018-05-17 - Assignees: Hi LLC - Applicants: Hi LLC - Inventors: Ryan Field; Husam Katnani; Bruno Do Valle; Rong Jin; Jacob Dahle - Web page: https://patentgrep.com/patent/US20190355773A1 ## CPC - G01J 1/44: Electric circuits {(for command of an exposure part G03B7/02)} - H10F 39/809: {of hybrid image sensors} - G01S 7/4861: Circuits for detection, sampling, integration or read-out - G01S 17/18: wherein range gates are used - H10F 30/225: the potential barrier working in avalanche mode, e.g. avalanche photodiodes - H10F 39/8057: {Optical shielding} - H10F 39/8067: {Reflectors} - G01J 2001/442: {Single-photon detection or photon counting} - G01J 2001/4466: {Avalanche} - G01J: MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY (light sources F21, H01J, H01K, H05B; investigating properties of materials by optical means G01N) - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION - G01S: RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES ## Abstract An exemplary stacked photodetector assembly includes a first wafer and a second wafer bonded to the first wafer. The first wafer includes a SPAD and has a thickness T1 configured to minimize absorption by the first wafer of photons included in light incident upon the first wafer while the SPAD is in a disarmed state. The second wafer has a thickness T2 configured to provide structural support for the first wafer. The stacked photodetector assembly includes a fast gating circuit electrically coupled to the SPAD and configured to arm and disarm the SPAD. ## Claims ### Claim 1 A stacked photodetector assembly comprising: a first wafer including a single photon avalanche diode (SPAD), the first wafer having a thickness T1 configured to minimize absorption by the first wafer of photons included in light incident upon the first wafer while the SPAD is in a disarmed state; and a second wafer having a thickness T2 including a fast gating circuit electrically coupled to the SPAD and configured to arm and disarm the SPAD, the second wafer bonded to the first wafer in a stacked configuration; wherein the fast gating circuit includes a capacitor configured to: be charged, while the SPAD is in the disarmed state, with a bias voltage by a voltage source, and supply, while the SPAD is in an armed state, the bias voltage to the SPAD such that a voltage across the SPAD is greater than a breakdown voltage of the SPAD. ### Claim 2 (depends on 1) The stacked photodetector assembly of claim 1, wherein the light comprises near infrared light. ### Claim 3 (depends on 1) The stacked photodetector assembly of claim 1, wherein the thickness T1 of the first wafer is less than 10 microns. ### Claim 4 (depends on 1) The stacked photodetector assembly of claim 1, wherein the thickness T2 of the second wafer is greater than 250 microns to provide structural support for the first wafer. ### Claim 5 (depends on 1) The stacked photodetector assembly of claim 1, wherein the fast gating circuit is electrically isolated from the SPAD. ### Claim 6 (depends on 1) The stacked photodetector assembly of claim 1, wherein the SPAD is a backside illuminated SPAD. ### Claim 7 (depends on 1) The stacked photodetector assembly of claim 1, further comprising a reflective mask on the first wafer and configured to block light outside of an active region of the SPAD. ### Claim 8 (depends on 1) The stacked photodetector assembly of claim 1, wherein: the first wafer includes a plurality of other SPADs; and the second wafer includes a plurality of respective other fast gating circuits electrically coupled to each of the plurality of other SPADs. ### Claim 9 (canceled) ### Claim 10 (depends on 1) The stacked photodetector assembly of claim 1, wherein the capacitor supplies the bias voltage to the SPAD while the capacitor is disconnected from the voltage source. ### Claim 11 (depends on 1) The stacked photodetector assembly of claim 1, further comprising: an additional voltage source connected to an input node of the SPAD and configured to supply a reverse bias voltage at the input node, the reverse bias voltage having a magnitude that is equal to or less than the breakdown voltage of the SPAD, wherein the voltage source is configured to selectively connect to the capacitor to charge the capacitor with the bias voltage, the bias voltage being an excess bias voltage that has a magnitude that is less than the magnitude of the reverse bias voltage supplied by the additional voltage source; and a switch configuration configured to put the SPAD into the armed state by connecting the capacitor to an output node of the SPAD while the capacitor is charged with the excess bias voltage and while the capacitor is disconnected from the voltage source; wherein, when the capacitor is connected to the SPAD, the capacitor supplies the excess bias voltage to the SPAD such that a voltage across the SPAD is greater than the breakdown voltage. ### Claim 12 (depends on 1) The stacked photodetector assembly of claim 1, wherein: the capacitor is connected to the SPAD; the voltage source is configured to selectively connect to the capacitor to charge the capacitor with the bias voltage, the bias voltage having a magnitude that is equal to or less than a breakdown voltage of the SPAD; and the fast gating circuit further comprises: an additional voltage source configured to supply a reverse excess bias voltage having a magnitude that is less than the magnitude of the bias voltage; and a switch configuration configured to put the SPAD into the armed state by connecting the additional voltage source to an input node of the SPAD while the capacitor is both charged with the bias voltage and disconnected from the voltage source. ### Claim 13 (depends on 1) The stacked photodetector assembly of claim 1, wherein the first wafer is fabricated as a silicon on insulator wafer. ### Claim 14 A stacked photodetector assembly comprising: a first wafer including a single photon avalanche diode (SPAD), and a fast gating circuit electrically coupled to the SPAD and configured to arm and disarm the SPAD, the first wafer having a thickness T1 configured to minimize absorption by the first wafer of photons included in light incident upon the first wafer while the SPAD is in a disarmed state; and a second wafer having a thickness T2 bonded to the first wafer in a stacked configuration and configured to provide structural support for the first wafer, the second wafer not including circuitry configured to control the SPAD. ### Claim 15 (depends on 14) The stacked photodetector assembly of claim 14, wherein the light comprises near infrared light. ### Claim 16 (depends on 14) The stacked photodetector assembly of claim 14, wherein the thickness T1 of the first wafer is less than 10 microns. ### Claim 17 (depends on 14) The stacked photodetector assembly of claim 14, wherein the fast gating circuit includes a capacitor configured to: be charged, while the SPAD is in the disarmed state, with a bias voltage by a voltage source, and supply, while the SPAD is in an armed state, the bias voltage to an output node of the SPAD such that a voltage across the SPAD is greater than a breakdown voltage of the SPAD. ### Claim 18 A stacked photodetector assembly comprising: a single photon avalanche diode (SPAD); a fast gating circuit electrically coupled to the SPAD and configured to arm and disarm the SPAD; a first wafer including the SPAD and the fast gating circuit, the first wafer having a thickness T1 configured to minimize absorption of photons included in light incident upon the first wafer while the SPAD is in a disarmed state; and a handle wafer having a thickness T2 bonded to the first wafer in a stacked configuration. ### Claim at position 19 19-20. (canceled) ### Claim 21 (depends on 18) The stacked photodetector assembly of claim 18, wherein the fast gating circuit includes a capacitor configured to: be charged, while the SPAD is in the disarmed state, with a bias voltage by a voltage source, and supply, while the SPAD is in an armed state, the bias voltage to an output node of the SPAD such that a voltage across the SPAD is greater than a breakdown voltage of the SPAD. ### Claim 22 A stacked photodetector assembly comprising: a single photon avalanche diode (SPAD); a fast gating circuit electrically coupled to the SPAD and configured to arm and disarm the SPAD; a first wafer including the SPAD, the first wafer having a thickness T1 configured to minimize absorption of photons included in light incident upon the first wafer while the SPAD is in a disarmed state; and a second wafer having a thickness T2 bonded to the first wafer in a stacked configuration; wherein the fast gating circuit includes a capacitor configured to: be charged, while the SPAD is in the disarmed state, with a bias voltage by a voltage source, and supply, while the SPAD is in an armed state, the bias voltage to an output node of the SPAD such that a voltage across the SPAD is greater than a breakdown voltage of the SPAD. ### Claim 23 (depends on 22) The stacked photodetector assembly of claim 22, wherein the second wafer includes the fast gating circuit. ### Claim 24 (depends on 22) The stacked photodetector assembly of claim 22, wherein the first wafer includes the fast gating circuit.