# US 2019/0355673 A1 · Electronic chip

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- Number: US 2019/0355673 A1
- Document ID: US20190355673A1
- Status: Published application
- Kind: A1
- Application number: 16/409,704
- Filed: 2019-05-10
- Published: 2019-11-21
- Earliest claimed: 2018-05-15
- Assignees: STMicroelectronics (Rousset) SAS
- Applicants: Stmicroelectronics (Rousset) SAS
- Inventors: Alexandre SARAFIANOS; Bruno NICOLAS; Daniele FRONTE
- Web page: https://patentgrep.com/patent/US20190355673A1

## CPC

- G06F 21/75: by inhibiting the analysis of circuitry or operation
- H10W 42/405: {using active circuits}
- G01N 27/041: {of a solid body}
- G01N 27/045: {Circuits (measuring resistance per se G01R27/00, e.g. G01R27/22)}
- H10W 20/43: Layouts of interconnections
- H10W 20/498: {Resistive arrangements or effects of, or between, wiring layers}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q)

## Abstract

The disclosure concerns an electronic chip including a resistive region and a first switch of selection of a first area in contact with the resistive region.

## Claims

### Claim 1

An electronic chip comprising:
a resistive region;
a first contact area in contact with the resistive region; and
a first switch configured to select the first contact area in contact with the resistive region.

### Claim 2 (depends on 1)

The chip of claim 1, wherein the resistive region is coil-shaped.

### Claim 3 (depends on 1)

The chip of claim 1, further comprising first wells, wherein the resistive region comprises a second well buried under the first wells.

### Claim 4 (depends on 3)

The chip of claim 3, wherein the second well is separated from the first wells.

### Claim 5 (depends on 1)

The chip of claim 1, wherein the resistive region is a metal track located on a surface of the chip.

### Claim 6 (depends on 1)

The chip of claim 1, comprising a semiconductor substrate, wherein the resistive region is formed in the semiconductor substrate.

### Claim 7 (depends on 1)

The chip of claim 1, comprising:
a second contact area in contact with the resistive region; and
a second switch configured to select the second contact area in contact with the resistive region.

### Claim 8 (depends on 7)

The chip of claim 7, wherein the first and second areas are located on a side of a surface of the chip.

### Claim 9 (depends on 7)

The chip of claim 7, further comprising a detector configured to detect a difference between measured and expected electric resistance values between the first and second areas.

### Claim 10 (depends on 9)

The chip of claim 9, wherein said expected value is a selected value.

### Claim 11 (depends on 10)

The chip of claim 10, wherein the selected value is randomly selected.

### Claim 12 (depends on 1)

The chip of claim 1, comprising:
a selector configured to sequentially select a plurality of pairs of first and second areas, wherein the resistive region includes a respective resistor between the first and second areas of each pair, each respective resistor having an electric resistance that is expected to have an expected value; and
a detector configured to detect measured values of electric resistance between the first and second areas of each of the pairs and detect a difference between the measured value and the expected value for each pair of first and second areas.

### Claim 13

A method of protecting an electronic chip against an attack, the method comprising:
selecting first and second contact areas coupled to respective first and second portions of a resistive region of the electronic chip;
determining a measured resistance value of a portion of the resistive region between the first and second portions; and
comparing with a threshold a difference between the measured resistance value and an expected value.

### Claim 14 (depends on 13)

The method of claim 13, wherein the selecting, determining, and comparing steps are performed in response to starting the electronic chip.

### Claim 15

An electronic chip comprising:
a resistive region;
a node; and
a connection device configured to connect to the node a selectable number of first contact areas in contact with the resistive region.

### Claim 16 (depends on 15)

The chip of claim 15, wherein the resistive region is defined by a semiconductor substrate.

### Claim 17 (depends on 15)

The chip of claim 15, wherein said number is randomly selectable.

### Claim 18 (depends on 15)

The chip of claim 15, wherein said number is selectable between 1 and 16.

### Claim 19 (depends on 15)

The chip of claim 15, wherein the first areas are selectable from among regularly distributed areas.

### Claim 20 (depends on 16)

The chip of claim 16, further comprising a detector configured to detect a difference between measured and expected electric resistance values between said node and a second contact area in contact with the resistive region.

### Claim 21

A device comprising:
an electronic chip that includes:
a resistive region;
a node; and
a connection device configured to connect to the node a selectable number of first contact areas in contact with the resistive region; and
a selector configured to select the number of first contact areas.

### Claim 22 (depends on 21)

The device of claim 21, comprising a metal plate located against a back side of the chip.

### Claim 23 (depends on 22)

The device of claim 22, wherein the first areas are located on a front side of the chip.

### Claim 24

A method of protecting a device against an attack, the method comprising:
selecting a number of first contact areas coupled to respective portions of a resistive region of an electronic chip of the device;
connecting the first contact areas to a node;
determining a measured resistance value of a portion of the resistive region between the first contacts; and
comparing with a threshold a difference between the measured resistance value and an expected value.

### Claim 25 (depends on 24)

The method of claim 24, wherein the selecting, connecting, determining, and comparing steps are performed in response to starting the electronic chip.
