Power line compensation for flash memory sense amplifiers
AssigneeSilicon Storage Technology, Inc.
InventorHieu Van Tran
Life of this patent
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Abstract
In one aspect, the invention concerns a memory system that compensates for power level variations in sense amplifiers for multilevel memory. For example, a compensation circuit can be employed to compensate for current or voltage variations in the power supplied to multilevel memory sense amplifiers. As another example, compensation can be accomplished by application of a bias voltage to the power supply. Another example is a sense amplifier configured with improved input common mode voltage range. Such sense amplifiers can be two-pair and three-pair sense amplifiers. Further examples of the invention include more simplified sense amplifier configurations, and sense amplifiers having reduced leakage current.
Claims8
A nonvolatile memory array system, comprising:
- a plurality of bitlines each in electrical communication with cells of a nonvolatile memory array;
- and
- a sense amplifier in communication with the plurality of bitlines, the sense amplifier comprising a plurality of transistors each having an input terminal configured to receive a sense amplifier signal, an output terminal configured to transmit an output signal, and a gate terminal;
- wherein each of the gate terminals is electrically connected to a bitline of the plurality of bitlines, so as to control a transmission of the output signals according to signals transmitted along the respective bitline.
Dependencies are inferred from the claim text.