Mold material architecture for package device structures
AssigneeIntle Corporation
InventorsOmkar G. Karhade, Nitin A. Deshpande
Life of this patent
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Abstract
Embodiments include a microelectronic device package structure having a die on a substrate, where a first side of the die is electrically coupled to the substrate, and a second side of the die is covered with a first material having a first thermal conductivity. A second material is adjacent to a sidewall of the die and adjacent to a sidewall of the first material. The second material has second thermal conductivity, smaller than the first thermal conductivity. The second material may have mechanical and/or underfill properties superior to those of the first material. Together, the two materials may provide a package structure having enhanced thermal and mechanical performance.
Claims21
A microelectronic device package structure comprising:
- a substrate;
- a die comprising an integrated circuit, wherein a first side of the die is electrically coupled to the substrate;
- a first material over a second side of the die, opposite the first side, wherein the first material has a first thermal conductivity;
- and
- a second material adjacent to a sidewall of the die and adjacent to a sidewall of the first material, wherein the second material has a second thermal conductivity, smaller than the first thermal conductivity.
An assembly comprising:
- a board;
- a microelectronic device package electrically coupled to the board, the microelectronic device package comprising:
- a substrate;
- a die comprising an integrated circuit, wherein a first side of the die is electrically coupled to the substrate;
- a first material over a second side of the die, opposite the first side, wherein the first material has a first thermal conductivity;
- a second material adjacent to a sidewall of the die and adjacent to a sidewall of the first material, wherein the second material has a second thermal conductivity, smaller than the first thermal conductivity;
- and
- a memory device on the board, wherein the memory device is electrically coupled to the die.
A method of fabricating a microelectronic package structure, comprising:
- forming a first material on a first side of a die, wherein the die comprises an integrated circuit, and wherein the first material comprises a first thermal conductivity;
- attaching a second side of the die, opposite the first side of the die, on a package substrate;
- and
- forming a second material on a sidewall of the die and on a sidewall of the first material, wherein the second material has a second thermal conductivity, smaller than the first thermal conductivity.
Dependencies are inferred from the claim text.