# US 2019/0320534 A1 · Printed circuit board and method for manufacturing printed circuit board > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0320534 A1 - Document ID: US20190320534A1 - Status: Published application - Kind: A1 - Application number: 16/461,896 - Filed: 2017-12-07 - Published: 2019-10-17 - Earliest claimed: 2017-01-11 - Assignees: Mitsubishi Electric Corporation - Applicants: Mitsubishi Electric Corporation - Inventors: Nicolas DEGRENNE; Stefan MOLLOV - Web page: https://patentgrep.com/patent/US20190320534A1 ## CPC - H05K 1/185: associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards - H05K 1/145: {Arrangements wherein electric components are disposed between and simultaneously connected to two planar printed circuit boards, e.g. Cordwood modules} - H05K 3/325: by abutting or pinching; Mechanical auxiliary parts therefor - H05K 3/4697: {having cavities, e.g. for mounting components (H05K3/4691 takes precedence)} - H10W 76/153: having interconnections in passages through the insulating or insulated base - H10W 76/45: Liquid fillings - H10W 76/47: Solid or gel fillings - H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H05K 1/0206: {by printed thermal vias} - H05K 3/366: {substantially perpendicularly to each other (H05K3/361 takes precedence)} - H05K 2201/0162: Silicon containing polymer, e.g. silicone - H05K 2201/026: Nanotubes or nanowires - H05K 2201/10166: Transistor - H05K 2203/0307: Providing micro- or nanometer scale roughness on a metal surface, e.g. by plating of nodules or dendrites - H10W 70/682: {comprising holes having chips therein} - H10W 72/07351: {characterised by changes in properties of the die-attach connectors during connecting} - H10W 72/07352: {changes in structures or sizes} - H10W 72/07354: {changes in dispositions} - H10W 72/30: Die-attach connectors - H10W 72/325: {Die-attach connectors having a filler embedded in a matrix} - H10W 72/327: {Multiple die-attach connectors having different sizes} - H10W 72/347: {Dispositions of multiple die-attach connectors} - H10W 72/351: {Materials of die-attach connectors} - H10W 72/352: {comprising metals or metalloids, e.g. solders} - H10W 72/353: {not comprising solid metals or solid metalloids, e.g. ceramics} - H10W 72/354: {comprising polymers} - H10W 72/926: {Multiple bond pads having different sizes} - H10W 72/944: {Dispositions of multiple bond pads} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract The present invention relates to a printed circuit board embedding a power die wherein interconnections between the power die and the printed circuit board are composed of micro/nano wires, the printed circuit board comprising a cavity wherein the power die is placed, and wherein the cavity is further filled with a dielectric fluid. ## Claims ### Claim at position 1 1-9. (canceled) ### Claim 10 A printed circuit board embedding a power die wherein interconnections between the power die and the printed circuit board are composed of micro/nano wires, the printed circuit board comprising a cavity wherein the power die is placed, the cavity is further filled with a dielectric fluid or an isolating silicone gel or grease or a dielectric oil, characterized in that the printed circuit board further comprises flexible membranes that deform when the fluid expands or shrinks with temperature and/or phase change of the fluid or the printed circuit board further comprises holes that enable the filling of the dielectric fluid within the cavity and the holes are closed with flexible membranes after the filling of the dielectric fluid within the cavity. ### Claim 11 (depends on 10) The printed circuit board according to claim 10, characterized in that the dielectric fluid has a low viscosity during cavity filling to allow the fluid to fill properly the volume of the cavity and between the nano wires. ### Claim 12 (depends on 10) The printed circuit board according to claim 10, characterized in that the dielectric fluid is a two-phase material. ### Claim 13 (depends on 10) The printed circuit board according to claim 10, characterized in that the printed circuit board further comprises at least one other cavity for enabling the dielectric fluid to shrink in and out of the at least one other cavity. ### Claim 14 (depends on 11) The printed circuit board according to claim 11, characterized in that the printed circuit board further comprises at least one other cavity for enabling the dielectric fluid to shrink in and out of the at least one other cavity. ### Claim 15 (depends on 12) The printed circuit board according to claim 12, characterized in that the printed circuit board further comprises at least one other cavity for enabling the dielectric fluid to shrink in and out of the at least one other cavity. ### Claim 16 (depends on 10) The printed circuit board according to claim 10, characterized in that the printed circuit board further comprises holes that enable the filling of the dielectric fluid within the cavity and the holes are filled up with a resin after the filling of the dielectric fluid within the cavity. ### Claim 17 (depends on 11) The printed circuit board according to claim 11, characterized in that the printed circuit board further comprises holes that enable the filling of the dielectric fluid within the cavity and the holes are filled up with a resin after the filling of the dielectric fluid within the cavity. ### Claim 18 (depends on 12) The printed circuit board according to claim 12, characterized in that the printed circuit board further comprises holes that enable the filling of the dielectric fluid within the cavity and the holes are filled up with a resin after the filling of the dielectric fluid within the cavity. ### Claim 19 (depends on 13) The printed circuit board according to claim 13, characterized in that the printed circuit board further comprises holes that enable the filling of the dielectric fluid within the cavity and the holes are filled up with a resin after the filling of the dielectric fluid within the cavity. ### Claim 20 (depends on 14) The printed circuit board according to claim 14, characterized in that the printed circuit board further comprises holes that enable the filling of the dielectric fluid within the cavity and the holes are filled up with a resin after the filling of the dielectric fluid within the cavity. ### Claim 21 (depends on 15) The printed circuit board according to claim 15, characterized in that the printed circuit board further comprises holes that enable the filling of the dielectric fluid within the cavity and the holes are filled up with a resin after the filling of the dielectric fluid within the cavity. ### Claim 22 A method for manufacturing a printed circuit board embedding a power die wherein interconnections between the power die and the printed circuit board are composed of micro/nano wires, the printed circuit board comprising a cavity wherein the power die is placed, characterized in that the method comprises the step of filling the cavity with a dielectric fluid or with an isolating silicone gel or with grease or with a dielectric oil, and in that the printed circuit board further comprises flexible membranes that deform when the fluid expands or shrinks with temperature and/or phase change of the fluid or the printed circuit board further comprises holes that enable the filling of the dielectric fluid within the cavity and the holes are closed with flexible membranes after the filling of the dielectric fluid within the cavity.