# US 2019/0320249 A1 · Planar photonic switch fabrics with reduced waveguide crossings

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- Number: US 2019/0320249 A1
- Document ID: US20190320249A1
- Status: Published application
- Kind: A1
- Application number: 16/453,257
- Filed: 2019-06-26
- Published: 2019-10-17
- Earliest claimed: 2017-12-12
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Nicolas Dupuis; Benjamin Lee
- Web page: https://patentgrep.com/patent/US20190320249A1

## CPC

- H04Q 11/0005: {Switch and router aspects}
- G02B 6/356: {in an optical cross-connect device, e.g. routing and switching aspects of interconnecting different paths propagating different wavelengths to (re)configure the various input and output links (switching polarized beams G02B6/3594; power equalizers G02B6/356 and G02B6/3594; path selecting means H04Q11/0001)}
- G02B 6/3596: {With planar waveguide arrangement, i.e. in a substrate, regardless if actuating mechanism is outside the substrate}
- H04Q 2011/0022: {using fibre gratings}
- H04Q 2011/0058: {Crossbar; Matrix}
- H04Q: SELECTING (switches, relays, selectors H01H; wireless communication networks H04W)
- G02B: OPTICAL ELEMENTS, SYSTEMS OR APPARATUS

## Abstract

Techniques for using planar photonic switch fabrics with reduced waveguide crossings are described. In one embodiment, a system is provided that comprises a memory that stores computer-executable components and a processor that executes computer-executable components stored in the memory. In one implementation, the computer-executable components comprise an arrangement component that arranges a first planar switch fabric topology. The computer-executable components further comprise a transformation component that interleaves a plurality of inputs of the first planar switch fabric topology and a plurality of outputs of the first planar switch fabric topology to form a second planar switch fabric topology, the second planar switch fabric topology having a lower number of waveguide crossings than the first planar switch fabric topology.

## Claims

### Claim 1

A system, comprising:
a memory that stores computer executable components; and
a processor that executes the computer executable components stored in the memory, wherein the computer executable components comprise:
an arrangement component that arranges a first planar switch fabric topology topology with a defined amount of waveguides between a plurality of inputs of the first planar switch fabric topology and a plurality of outputs of the first planar switch fabric topology; and
a waveguide routing component that routes a first waveguide of the first planar switch fabric topology around a perimeter of a first input/output (I/O) stage of the first planar switch fabric topology to produce a second planar switch fabric topology, the first I/O stage being located on an interior of the second planar switch fabric topology, the second planar switch fabric topology having a lower number of waveguide crossings of the waveguides than the first planar switch fabric topology, wherein the second planar switch fabric topology has the defined amount of waveguides.

### Claim 2 (depends on 1)

The system of claim 1, wherein the first I/O stage comprises an input stage or an output stage.

### Claim 3 (depends on 1)

The system of claim 1, wherein a signal, an input or a light wave is injected into the first I/O stage of the second planar switch fabric topology using a second waveguide located on a separate planar layer as the first waveguide.

### Claim 4 (depends on 3)

The system of claim 3, wherein a first layer of the second planar switch fabric topology is fabricated in a first material, and a second layer of the second planar switch fabric topology is fabricated in a second material that is different from the first material.

### Claim 5 (depends on 4)

The system of claim 4, wherein the second layer of the second planar switch fabric topology comprises a second waveguide that is fabricated in silicon nitride.

### Claim 6 (depends on 1)

The system of claim 1, wherein a signal, input, or light wave is injected into the first I/O stage of the second planar switch fabric topology using an out of plane coupling structure.

### Claim 7 (depends on 6)

The system of claim 6, wherein the out of plane coupling structure comprises a grating coupler.

### Claim 8

A computer-implemented method, comprising:
arranging, by a system operatively coupled to a processor, a first planar switch fabric topology with a defined amount of waveguides between a plurality of inputs of the first planar switch fabric topology and a plurality of outputs of the first planar switch fabric topology; and
routing, by the system, a first waveguide of the first planar switch fabric topology around a perimeter of a first input/output (I/O) stage of the first planar switch fabric topology to produce a second planar switch fabric topology, the first I/O stage being located on an interior of the second planar switch fabric topology, the second planar switch fabric topology having a lower number of waveguide crossings of the waveguides than the first planar switch fabric topology, wherein the second planar switch fabric topology has the defined amount of waveguides.

### Claim 9 (depends on 8)

The computer-implemented method of claim 8, wherein the first I/O stage comprises an input stage or an output stage.

### Claim 10 (depends on 8)

The computer-implemented method of claim 8, further comprising:
injecting, by the system, a signal, an input or a light wave into the first I/O stage of the second planar switch fabric topology using an out of plane coupling structure.

### Claim 11 (depends on 10)

The computer-implemented method of claim 10, further comprising:
injecting, by the system, a signal, an input or a light wave into the first I/O stage of a back side of the second planar switch fabric topology.

### Claim 12 (depends on 10)

The computer-implemented method of claim 10, wherein the out of plane coupling structure comprises an angled reflective surface.

### Claim 13 (depends on 8)

The computer-implemented method of claim 8, further comprising:
injecting, by the system, a signal, an input or a light wave into the first I/O stage of the second planar switch fabric topology using a layer of planar optical waveguides.

### Claim 14 (depends on 8)

The computer-implemented method of claim 8, wherein the second planar switch fabric topology comprises a data transmitting optical emitter that is integrated within an interior of the second planar switch fabric topology.

### Claim 15

A computer program product that facilitates implementation of planar photonic switch fabrics with reduced waveguide crossings, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions being executable by a processor to cause the processor to:
arrange a first planar switch fabric topology with a defined amount of waveguides between a plurality of inputs of the first planar switch fabric topology and a plurality of outputs of the first planar switch fabric topology; and
route a first waveguide of the first planar switch fabric topology around a perimeter of a first input/output (I/O) stage of the first planar switch fabric topology to produce a second planar switch fabric topology, the first I/O stage being located on an interior of the second planar switch fabric topology, the second planar switch fabric topology having a lower number of waveguide crossings of the waveguides than the first planar switch fabric topology, wherein the second planar switch fabric topology has the defined amount of waveguides.

### Claim 16 (depends on 15)

The computer program product of claim 15, wherein the first I/O stage comprises an input stage or an output stage.

### Claim 17 (depends on 15)

The computer program product of claim 15, wherein the second planar switch fabric topology comprises a data receiving optical detector that is integrated within an interior of the second planar switch fabric topology.

### Claim 18 (depends on 15)

The computer program product of claim 15, wherein a signal, an input or a light wave is injected into the first I/O stage of the second planar switch fabric topology using an out of plane coupling structure.

### Claim 19 (depends on 18)

The computer program product of claim 18, wherein the out of plane coupling structure comprises a grating coupler.

### Claim 20 (depends on 15)

The computer program product of claim 15, wherein a signal, an input or a light wave is injected into the first I/O stage of a top side of the second planar switch fabric topology.
