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US 2019/0319188 A1Published application
Nano memory device
AssigneeSouth Dakota Board of Regents
InventorsCharles Tolle, Haiping Hong, Christian Widener, Greg Christensen, Jack Yang
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Abstract
A non-volatile memory circuit in embodiments of the present invention may have one or more of the following features: (a) a logic source, and (b) a semi-conductive device being electrically coupled to the logic source, having a first terminal, a second terminal and a nano-grease with significantly reduced amount of carbon nanotube loading located between the first and second terminal, wherein the nano-grease exhibits non-volatile memory characteristics.
Claims20
A non-volatile memory circuit, comprising:
- a logic source;
- and
- a semi-conductive device being electrically coupled to the logic source, having a first terminal, a second terminal and a nano-grease with significantly reduced amount of carbon nanotube loading located between the first and second terminal, wherein the nano-grease exhibits non-volatile memory characteristics.
A non-volatile memory circuit, comprising:
- a voltage source;
- a semi-conductive device being electrically coupled to the logic source, having a first terminal, a second terminal and a nano-grease with significantly reduced amount of carbon nanotube loading located between the first and second terminal, wherein the nano-grease exhibits non-volatile memory characteristics;
- and
- a voltage sensor electrically coupled in parallel with the semi-conductive device capable of measuring the voltage drop at the semi-conductive device.
1 more element
Dependencies are inferred from the claim text.