# US 2019/0318993 A1 · Enabling long interconnect bridges

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- Number: US 2019/0318993 A1
- Document ID: US20190318993A1
- Status: Published application
- Kind: A1
- Application number: 16/469,084
- Filed: 2016-12-28
- Published: 2019-10-17
- Earliest claimed: 2016-12-28
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Ravindranath V. Mahajan; Zhiguo Qian; Henning Braunisch; Kemal Aygun; Sujit Sharan
- Web page: https://patentgrep.com/patent/US20190318993A1

## CPC

- H10W 70/65: Shapes or dispositions of interconnections
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/618: {the bridge chips being embedded in the package substrates, interposers or redistribution layers}
- H10W 90/00: Package configurations
- H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs}
- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H10W 44/248: {for antennas}
- H10W 70/685: comprising multiple insulating layers
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A device and method of utilizing a repeater circuit to extend the viable length of an interconnect bridge. Integrated circuit packages using a repeater circuit in a repeater die, embedded in a substrate, and included in an interconnect bridge are show. Methods of connecting semiconductor dies using interconnect bridges coupled with repeater circuits are shown.

## Claims

### Claim at position 1

-24. (canceled)

### Claim 25

A semiconductor device, comprising:
a substrate;
a first semiconductor die attached to the substrate;
a second semiconductor die attached to the substrate;
an interconnect bridge electrically coupled to the first semiconductor die and the second semiconductor die; and
a repeater circuit electrically coupled to the interconnect bridge along a communication path between the first semiconductor die and the second semiconductor die.

### Claim 26 (depends on 25)

The semiconductor device of claim 25, further comprising:
a repeater die, including the repeater circuit; and
wherein the repeater die is attached to the substrate between the first semiconductor die and the second semiconductor die.

### Claim 27 (depends on 26)

The semiconductor device of claim 26, wherein a first edge of the repeater die extends past a first edge of the interconnect bridge creating a first repeater die overhang; and
herein the first repeater die overhang is used for power delivery to the repeater die.

### Claim 28 (depends on 27)

The semiconductor device of claim 27, wherein a second edge of the repeater die extends past a second edge of the interconnect bridge creating a second repeater die overhang; and
wherein the second repeater die overhang is used for power delivery to the repeater die.

### Claim 29 (depends on 25)

The semiconductor device of claim 25, wherein the repeater circuit is at least partially embedded within the substrate.

### Claim 30 (depends on 29)

The semiconductor device of claim 29, wherein the repeater circuit is powered via the interconnect bridge.

### Claim 31 (depends on 25)

The semiconductor device of claim 25, further comprising:
a third semiconductor die attached to the substrate; and
wherein the third semiconductor die is electrically coupled to the interconnect bridge.

### Claim 32 (depends on 31)

The semiconductor device of claim 31, wherein the third semiconductor die is located between the first semiconductor die and the second semiconductor die;
wherein the third semiconductor die is a memory die; and
wherein the third semiconductor die includes the repeater circuit.

### Claim 33 (depends on 25)

The semiconductor device of claim 25, wherein the repeater circuit includes a signal receiver and a signal driver;
wherein the first semiconductor die includes a signal receiver and a signal driver;
wherein the second semiconductor die includes a signal receiver and a signal driver;
wherein the signal receivers of the repeater circuit, the first semiconductor die, and the second semiconductor die are the same size; and
wherein the signal drivers of the repeater circuit, the first semiconductor die, and the second semiconductor die are the same size.

### Claim 34 (depends on 25)

The semiconductor device of claim 25, wherein the repeater circuit is included in the interconnect bridge.

### Claim 35 (depends on 25)

The semiconductor device of claim 25, wherein the interconnect bridge is a silicon interconnect bridge embedded within the substrate.

### Claim 36

A semiconductor device comprising:
a substrate;
a first semiconductor die attached to the substrate;
a second semiconductor die attached to the substrate;
a silicon interconnect bridge at least partially embedded in the substrate, the silicon interconnect bridge electrically coupled to the first semiconductor die and the second semiconductor die; and
a repeater circuit electrically coupled to the silicon interconnect bridge along a communication path between the first semiconductor die and the second semiconductor die.

### Claim 37 (depends on 36)

The semiconductor device of claim 36, further comprising:
a repeater die, including the repeater circuit; and
wherein the repeater die is attached to the substrate between the first semiconductor die and the second semiconductor die.

### Claim 38 (depends on 37)

The semiconductor device of claim 37, wherein a first edge of the repeater die extends past a first edge of the silicon interconnect bridge creating a first repeater die overhang; and
Wherein the first repeater die overhang is used for power delivery to the repeater die.

### Claim 39 (depends on 38)

The semiconductor device of claim 38, wherein a second edge of the repeater die extends past a second edge of the silicon interconnect bridge creating a second repeater die overhang; and
wherein the second repeater die overhang is used for power delivery to the repeater die.

### Claim 40 (depends on 36)

The semiconductor device of claim 36, further comprising:
a third semiconductor die attached to the substrate; and
wherein the third semiconductor die is electrically coupled to the silicon interconnect bridge.

### Claim 41 (depends on 40)

The semiconductor device of claim 40, wherein the third semiconductor die is located between the first semiconductor die and the second semiconductor die; and
wherein the second semiconductor die includes the repeater circuit.

### Claim 42 (depends on 41)

The semiconductor device of claim 41, wherein the third semiconductor die is a memory die.

### Claim 43 (depends on 36)

The semiconductor device of claim 36, wherein the repeater circuit includes a signal receiver and a signal driver; and
wherein the first semiconductor die includes a signal receiver and a signal driver;
wherein the second semiconductor die includes a signal receiver and a signal driver;
wherein the signal receivers of the repeater circuit, the first semiconductor die, and the second semiconductor die are the same size; and
wherein the signal drivers of the repeater circuit, the first semiconductor die, and the second semiconductor die are the same size.

### Claim 44 (depends on 36)

The semiconductor device of claim 36, wherein the repeater circuit is included in the silicon interconnect bridge.

### Claim 45 (depends on 44)

The semiconductor device of claim 44, wherein the repeater circuit is powered via the silicon interconnect bridge.

### Claim 46

A method comprising:
embedding, at least partially, a lithographically created interconnect bridge in a substrate;
attaching a first semiconductor die to the substrate, including electrically coupling the first semiconductor to a first end of the interconnect bridge;
attaching a second semiconductor die to the substrate, including electrically coupling the second semiconductor die to the interconnect bridge; and
coupling, electrically, a repeater circuit to the interconnect bridge along a communication path between the first semiconductor die and the second semiconductor die.

### Claim 47 (depends on 46)

The method of claim 46, wherein the second semiconductor die is electrically coupled to a second end of the interconnect bridge; and
wherein the repeater circuit is located in between the first end and the second end of the interconnect bridge.

### Claim 48 (depends on 46)

The method of claim 46, further including:
attaching a third semiconductor die attached to the substrate, including electrically coupling the third semiconductor die to the interconnect bridge;
wherein the repeater circuit is included in the second semiconductor die; and
wherein the second semiconductor die is electrically coupled to the interconnect bridge in between the first semiconductor die and the third semiconductor die.

### Claim 49 (depends on 46)

The method of claim 46, wherein the interconnect bridge is a silicon interconnect bridge.