# US 2019/0318973 A1 · Circuit module

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- Number: US 2019/0318973 A1
- Document ID: US20190318973A1
- Status: Published application
- Kind: A1
- Application number: 16/454,302
- Filed: 2019-06-27
- Published: 2019-10-17
- Earliest claimed: 2016-12-28
- Assignees: Murata Manufacturing Co., Ltd.
- Applicants: Murata Manufacturing Co., Ltd.
- Inventors: Ken OKADA; Kazushige SATO; Shingo FUNAKAWA; Katsuhiko FUJIKAWA; Nobumitsu AMACHI
- Web page: https://patentgrep.com/patent/US20190318973A1

## CPC

- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- H10W 74/40: characterised by their materials
- H03H 9/25: Constructional features of resonators using surface acoustic waves {(devices for manipulating acoustic surface waves in general G10K11/36)}
- H05K 1/0204: {using means for thermal conduction connection in the thickness direction of the substrate (H05K1/0207 takes precedence)}
- H05K 1/0209: {External configuration of printed circuit board adapted for heat dissipation, e.g. lay-out of conductors, coatings}
- H10W 40/10: Arrangements for heating
- H10W 42/276: {the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation}
- H10W 70/442: {of multiple leadframes in a single chip}
- H10W 70/614: {the multiple chips being integrally enclosed}
- H10W 74/014: {using batch processing}
- H10W 74/114: {by a substrate and the encapsulations}
- H10W 90/00: Package configurations
- H03H 9/0542: {consisting of a lateral arrangement (H03H9/0566 takes precedence)}
- H05K 1/0271: {Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion}
- H05K 3/284: {for encapsulating mounted components (H05K1/185 takes precedence)}
- H05K 2201/10378: Interposers
- H05K 2201/10621: Components characterised by their electrical contacts
- H05K 2201/2045: Protection against vibrations
- H10W 70/685: comprising multiple insulating layers
- H10W 72/0198: {batch processes}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P)
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS

## Abstract

A circuit module (101) includes a substrate (1) having a principal surface (1a), a first component (6) mounted on the principal surface (1a), and a sealing resin portion (3) that covers at least a side surface of the first component (6) while covering the principal surface (1a). The first component (6) includes an empty portion (6c) and a connection portion (6b) exposed to the empty portion (6c). The sealing resin portion (3) is arranged to avoid at least a part of a region that is included in an upper surface of the first component (6) and corresponds to the empty portion (6c).

## Claims

### Claim 1

A circuit module comprising:
a substrate having a principal surface;
a first component mounted on the principal surface; and
a sealing resin portion covering at least a side surface of the first component while covering the principal surface,
the first component including an empty portion and a connection portion exposed to the empty portion,
the sealing resin portion being arranged to avoid at least a part of a region included in an upper surface of the first component and corresponding to the empty portion.

### Claim 2 (depends on 1)

The circuit module according to claim 1, wherein
the first component includes a first resin portion at a higher level than the empty portion, the first resin portion comprising a first resin, and
an upper surface of the first resin portion and an upper surface of the sealing resin portion are in an identical plane.

### Claim 3 (depends on 1)

The circuit module according to claim 1, wherein
the upper surface of the first component is positioned lower than an upper surface of the sealing resin portion, a second resin portion is arranged over the first component, the second resin portion comprising a second resin having a lower Young's modulus than a material for the sealing resin portion, and an upper surface of the second resin portion and the upper surface of the sealing resin portion are in an identical plane.

### Claim 4 (depends on 1)

The circuit module according to claim 1, wherein
a conductor film is arranged to cover at least a boundary between the upper surface of the first component and the upper surface of the sealing resin portion.

### Claim 5 (depends on 3)

The circuit module according to claim 3, wherein
a conductor film is arranged to cover at least a boundary between the upper surface of the second resin portion and the upper surface of the sealing resin portion.

### Claim 6 (depends on 2)

The circuit module according to claim 2, wherein
a conductor film is arranged to cover at least a boundary between the upper surface of the first component and the upper surface of the sealing resin portion.