# US 2019/0318693 A1 · Display device

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- Number: US 2019/0318693 A1
- Document ID: US20190318693A1
- Status: Published application
- Kind: A1
- Application number: 16/387,439
- Filed: 2019-04-17
- Published: 2019-10-17
- Earliest claimed: 2018-04-17
- Assignees: Samsung Display Co., Ltd.
- Applicants: Samsung Display Co., Ltd.
- Inventors: Young Taeg JUNG; Hyun Chol BANG; Ju Hee HYEON
- Web page: https://patentgrep.com/patent/US20190318693A1

## CPC

- G09G 3/3266: Details of drivers for scan electrodes
- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 3/3291: in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- G09G 2300/0413: Details of dummy pixels or dummy lines in flat panels
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2300/0439: Pixel structures
- G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A display device includes: a substrate including first and second display regions and first and second non-display regions; a plurality of first pixels in the first display region; a plurality of second pixels in the second display region; a plurality of first scan stage circuits in the first non-display region, the first scan stage circuits configured to provide a scan signal to the first pixels; a plurality of second scan stage circuits in the second non-display region, the second scan stage circuits configured to provide a scan signal to the second pixels; a plurality of dummy scan stage circuits in the second non-display region, the dummy scan stage circuits being between the second scan stage circuits; and a scan bridge line in the second non-display region, the scan bridge line connecting one second scan stage circuit among the second scan stage circuits and a dummy scan stage circuit adjacent thereto.

## Claims

### Claim 1

A display device comprising:
a substrate including first and second display regions and first and second non-display regions;
a plurality of first pixels in the first display region;
a plurality of second pixels in the second display region;
a plurality of first scan stage circuits in the first non-display region, the first scan stage circuits configured to provide a scan signal to the first pixels;
a plurality of second scan stage circuits in the second non-display region, the second scan stage circuits configured to provide a scan signal to the second pixels;
a plurality of dummy scan stage circuits in the second non-display region, the dummy scan stage circuits being between the second scan stage circuits; and
a scan bridge line in the second non-display region, the scan bridge line connecting one second scan stage circuit among the second scan stage circuits and a dummy scan stage circuit adjacent thereto.

### Claim 2 (depends on 1)

The display device of claim 1, wherein the dummy scan stage circuits are in a floating state.

### Claim 3 (depends on 2)

The display device of claim 2, wherein a first side of the scan bridge line is connected to the one second scan stage circuit, and a second side of the scan bridge line is connected to a dummy scan stage circuit from among the plurality of dummy scan stage circuits.

### Claim 4 (depends on 3)

The display device of claim 3, wherein an output terminal of the dummy scan stage circuit is electrically connected to a second pixel corresponding to the one second scan stage circuit.

### Claim 5 (depends on 4)

The display device of claim 4, wherein the dummy scan stage circuit is closer to the corresponding second pixel than the one second scan stage circuit.

### Claim 6 (depends on 5)

The display device of claim 5, wherein the scan bridge line is configured to transfer a scan signal of the one second scan stage circuit to a second pixel corresponding to the one second scan stage circuit through the output terminal of the dummy scan stage circuit.

### Claim 7 (depends on 6)

The display device of claim 6, wherein, in a plan view, the scan bridge line extends in a length direction of the substrate, and overlaps with a portion of the one second scan stage circuit and a portion of the dummy scan stage circuit.

### Claim 8 (depends on 7)

The display device of claim 7, wherein the one second scan stage circuit includes at least one transistor and lines connected to the transistor.

### Claim 9 (depends on 8)

The display device of claim 8, wherein the scan bridge line is integrally provided with the output terminal of the dummy scan stage circuit.

### Claim 10 (depends on 1)

The display device of claim 1, wherein a distance between the second scan stage circuits is larger than a distance between the first scan stage circuits.

### Claim 11 (depends on 10)

The display device of claim 10, wherein the second display region is connected to the first display region, and has a width smaller than a width of the first display region.

### Claim 12 (depends on 1)

The display device of claim 1, further comprising:
a plurality of first emission stage circuits in the first non-display region, the first emission stage circuits configured to supply an emission control signal to the first pixels;
a plurality of second emission stage circuits in the second non-display region, the second emission stage circuits configured to supply an emission control signal to the second pixels;
a plurality of dummy emission stage circuits in the second non-display region, the dummy emission stage circuits being between the second emission stage circuits; and
an emission bridge line in the second non-display region, the emission bridge line connecting one second emission stage circuit among the second emission stage circuits and a dummy emission stage circuit adjacent thereto.

### Claim 13 (depends on 12)

The display device of claim 12, wherein the dummy emission stage circuits are in a floating state.

### Claim 14 (depends on 13)

The display device of claim 13, wherein a first side of the emission bridge line is connected to the one second emission stage circuit, and a second side of the emission bridge line is connected to a dummy emission stage circuit from among the dummy emission stage circuits.

### Claim 15 (depends on 14)

The display device of claim 14, wherein an output terminal of the dummy emission stage circuit is electrically connected to a second pixel corresponding to the one second emission stage circuit.

### Claim 16 (depends on 15)

The display device of claim 15, wherein the emission bridge line is configured to transfer an emission control signal of the one second emission stage circuit to a second pixel corresponding to the one second emission stage circuit through the output terminal of the dummy emission stage circuit.

### Claim 17 (depends on 16)

The display device of claim 16, wherein the one second emission stage circuit includes at least one transistor and lines connected to the transistor.

### Claim 18 (depends on 17)

The display device of claim 17, wherein the emission bridge line is integrally provided with the output terminal of the dummy emission stage circuit.

### Claim 19 (depends on 12)

The display device of claim 12, wherein a distance between the second emission stage circuits is larger than a distance between the first emission stage circuits.

### Claim 20

A display device comprising:
a substrate including first and second display regions and first and second non-display regions;
a plurality of first pixels in the first display region;
a plurality of second pixels in the second display region;
a plurality of first scan stage circuits in the first non-display region, the first scan stage circuits configured to provide a scan signal to the first pixels;
a plurality of first emission stage circuits in the first non-display region, the first emission stage circuits configured to provide an emission control signal to the first pixels;
a plurality of second scan stage circuits in the second non-display region, the second scan stage circuits configured to provide a scan signal to the second pixels;
a plurality of dummy scan stage circuits in the second non-display region, the dummy scan stage circuits being between the second scan stage circuits;
a plurality of second emission stage circuits in the second non-display region, the second emission stage circuits configured to provide an emission control signal to the second pixels;
a plurality of dummy emission stage circuits in the second non-display region, the dummy emission stage circuits being between the second emission stage circuits;
a scan bridge line in the second non-display region, the scan bridge line connecting one second scan stage circuit among the second scan stage circuits and a dummy scan stage circuit adjacent thereto; and
an emission bridge line in the second non-display region, the emission bridge line connecting one second emission stage circuit among the second emission stage circuits and a dummy emission stage circuit adjacent thereto.
