# US 2019/0317876 A1 · Debugging of prefixed code > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0317876 A1 - Document ID: US20190317876A1 - Status: Published application - Kind: A1 - Application number: 16/447,463 - Filed: 2019-06-20 - Published: 2019-10-17 - Earliest claimed: 2015-09-30 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Michael K. Gschwind - Web page: https://patentgrep.com/patent/US20190317876A1 ## CPC - G06F 11/362: Debugging of software - G06F 9/30185: {according to one or more bits in the instruction, e.g. prefix, sub-opcode} - G06F 9/38: Concurrent instruction execution, e.g. pipeline or look ahead - G06F 9/30043: {LOAD or STORE instructions; Clear instruction} - G06F 9/3017: {Runtime instruction translation, e.g. macros} - G06F 9/324: {using program counter relative addressing} - G06F 9/355: Indexed addressing - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A debugging capability that enables the efficient debugging of code that has prefixes, referred to herein as prefixed code. To debug application code, in which the application code includes a prefixed instruction to be modified by a prefix, a trap is provided. The trap is configured to report a presence of the prefix, but to otherwise perform the trap functions absent the prefix; i.e., the prefix is otherwise ignored in the processing of the trap. ## Claims ### Claim 1 A computer program product for facilitating debugging of applications, the computer program product comprising: a non-transitory computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: providing, by one or more processors, a trap to be used in debugging of application code, the application code including a prefixed instruction, and the trap to replace the prefixed instruction by placing the trap at a selected location in the application code, wherein the selected location includes over the prefixed instruction, the trap configured to ignore the prefix in execution; executing, by the one or more processors, the application code, wherein the executing comprises ignoring that the trap is preceded by a prefix instruction and halting the executing at the trap and transferring control to a debug control; and based on the transferring, performing processing related debugging of the application code. ### Claim 2 (depends on 1) The computer program product of claim 1, wherein the prefix is provided via a prefix instruction placed in the application code prior to the prefixed instruction. ### Claim 3 (depends on 2) The computer program product of claim 2, wherein the prefix instruction and the prefixed instruction are individual instructions initially provided separately to decode units to be decoded. ### Claim 4 (depends on 1) The computer program product of claim 1, the method further comprising: restarting, by the one or more processors, execution of the application code at the prefixed instruction. ### Claim 5 (depends on 4) The computer program product of claim 4, wherein the restarting comprises: replacing, by the one or more processors, the trap with the prefixed instruction; and resuming execution of the application code at the prefixed instruction. ### Claim 6 (depends on 4) The computer program product of claim 4, wherein the method further comprises using another trap to debug the application code, the other trap to be placed at a chosen location within the application code, the chosen location being one of over the prefix instruction or over another prefixed instruction. ### Claim 7 (depends on 1) The computer program product of claim 1, wherein executing the application code further comprises: reporting the presence of the prefix. ### Claim 8 (depends on 7) The computer program product of claim 7, wherein the reporting the presence of the prefix includes reporting at least one of an address of the prefix instruction or an indication of the prefix instruction. ### Claim 9 (depends on 7) The computer program product of claim 7, wherein the reporting the presence of the prefix includes reporting an address of the trap and an indication that the trap was taken. ### Claim 10 (depends on 8) The computer program product of claim 8, wherein the reporting further comprises reporting a length of the prefix. ### Claim 11 The computer program product of 1, wherein the prefixed instruction is defined to be modified by a prefix. ### Claim 12 The computer program product of 1, wherein the trap is further configured to report a presence of the prefix. ### Claim 13 A computer system for facilitating debugging of applications, the computer system comprising: a memory; and one or more processors in communication with the memory, wherein the computer system is configured to perform a method, said method comprising: providing, by the one or more processors, a trap to be used in debugging of application code, the application code including a prefixed instruction, and the trap to replace the prefixed instruction by placing the trap at a selected location in the application code, wherein the selected location includes over the prefixed instruction, the trap configured to ignore the prefix in execution; executing, by the one or more processors, the application code, wherein the executing comprises ignoring that the trap is preceded by a prefix instruction and halting the executing at the trap and transferring control to a debug control; and based on the transferring, performing processing related debugging of the application code. ### Claim 14 (depends on 13) The computer system of claim 13, wherein the prefix is provided via a prefix instruction placed in the application code prior to the prefixed instruction. ### Claim 15 (depends on 14) The computer system of claim 14, wherein the prefix instruction and the prefixed instruction are individual instructions initially provided separately to decode units to be decoded. ### Claim 16 (depends on 13) The computer system of claim 13, the method further comprising: restarting, by the one or more processors, execution of the application code at the prefixed instruction. ### Claim 17 (depends on 16) The computer system of claim 16, wherein the restarting comprises: replacing, by the one or more processors, the trap with the prefixed instruction; and resuming execution of the application code at the prefixed instruction. ### Claim 18 (depends on 16) The computer system of claim 16, wherein the method further comprises using another trap to debug the application code, the other trap to be placed at a chosen location within the application code, the chosen location being one of over the prefix instruction or over another prefixed instruction. ### Claim 19 (depends on 13) The computer system of claim 13, wherein the prefixed instruction is defined to be modified by a prefix. ### Claim 20 (depends on 13) The computer system of claim 13, wherein the trap is further configured to report a presence of the prefix.