# US 2019/0317697 A1 · Command selection policy with read priority

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2019/0317697 A1
- Document ID: US20190317697A1
- Status: Published application
- Kind: A1
- Application number: 16/117,356
- Filed: 2018-08-30
- Published: 2019-10-17
- Earliest claimed: 2018-04-12
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Patrick A. La Fratta; Robert M. Walker
- Web page: https://patentgrep.com/patent/US20190317697A1

## CPC

- G06F 3/0611: {in relation to response time}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0604: {Improving or facilitating administration, e.g. storage management}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 2212/7202: Allocation control and policies
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Apparatuses and methods related to command selection policy for electronic memory or storage are described. Commands to a memory controller may be prioritized based on a type of command, a timing of when one command was received relative to another command, a timing of when one command is ready to be issued to a memory device, or some combination of such factors. For instance, a memory controller may employ a first-ready, first-come, first-served (FRFCFS) policy in which certain types of commands (e.g., read commands) are prioritized over other types of commands (e.g., write commands). The policy may employ exceptions to such an FRFCFS policy based on dependencies or relationships among or between commands. An example can include inserting a command into a priority queue based on a category corresponding to respective commands, and iterating through a plurality of priority queues in order of priority to select a command to issue.

## Claims

### Claim at position 1

1-20. (canceled)

### Claim 21

An apparatus, comprising:
a timer unit configured to generate timestamps for activation commands provided to a memory device in association with implementing a command selection policy; and
command selection logic configured to implement the command selection policy by:
responsive to receiving a read command, blocking a first number of write commands to a bank;
responsive to blocking the first number of write commands, issuing, to the memory device, an activation command associated with the read command, wherein the read command comprises an address of the bank and a channel of the memory device;
responsive to issuing the activation command, blocking a second number of write commands to the channel after an expiration of a predetermined duration of time that is based on memory device timing parameters; and
responsive to blocking the second number of write commands, issuing the read command to the memory device.

### Claim 22 (depends on 21)

The apparatus of claim 21, wherein the memory device timing parameters include a row-to-column delay, a write-to-read delay, and a column-to-column delay.

### Claim 23 (depends on 22)

The apparatus of claim 22, wherein the predetermined duration of time comprises a difference between the row-to-column delay and the write-to-read delay.

### Claim 24 (depends on 23)

The apparatus of claim 23, wherein the predetermined duration of time is selected based on a read-after-write dependence associated with the read command.

### Claim 25 (depends on 24)

The apparatus of claim 24, wherein the command selection logic is further configured to select the predetermined duration of time to include a difference between the row-to-column delay and the column-to-column delay based on a determination that the read-after-write dependence is associated with the read command.

### Claim 26

An apparatus, comprising:
a command queue to receive a read command for a bank and a channel of a memory device;
a bank unit to provide bank addresses associated with outstanding read commands and elevated write commands from the memory commands;
bank state unit configured to indicate a state of banks corresponding to a memory device; and
command selection logic to:
determine whether there is a write command with a read-after-write dependence to the read command using the bank addresses;
block a first number of write commands to the bank using the bank state unit to indicate a blocking state for the bank;
issue an activation command associated with the read command;
block a second number of write commands to the channel using the bank state unit to indicate a blocking state for a plurality of banks in the channel; and
select the write command and the read command for issuance based on a first-ready, first-come, first-served (FRFCFS) policy in response to determining that the write command has the read-after-write dependence to the read command.

### Claim 27 (depends on 26)

The apparatus of claim 26, further comprising a decoder to decode a bank address corresponding to the read command.

### Claim 28 (depends on 27)

The apparatus of claim 27, wherein the command selection logic is further configured to determine whether there is the elevated write command with the read-after-write dependence to the read command by comparing the bank to the bank addresses to determine whether the read-after-write dependence exists.

### Claim 29 (depends on 26)

The apparatus of claim 26, further comprising a decoder to decode a row address corresponding to the read command.

### Claim 30 (depends on 29)

The apparatus of claim 29, the command selection logic is further configured to determine whether there is the elevated write command with the read-after-write dependence to the read command by comparing the row address to a plurality of row addresses provided by the bank unit to determine whether the read-after-write dependence exists.

### Claim 31

A method, comprising:
decoding a bank address corresponding to a bank and a channel address corresponding to a channel of a memory device from a read command received at the memory device;
blocking a first number of write commands to the bank;
issuing an activation command associated with the read command;
blocking a second number of write commands to the channel; and
selecting the read command, from a plurality of prioritized queues, for issuance based on a first-ready, first-come, first-served (FRFCFS) policy in which the read command is prioritized over the first number of write commands and the second number of write commands.

### Claim 32 (depends on 31)

The method of claim 31, wherein the plurality of prioritized queues includes a highest priority queue comprised of column read commands.

### Claim 33 (depends on 32)

The method of claim 32, wherein the plurality of prioritized queues includes a second highest priority queue comprised of row read commands.

### Claim 34 (depends on 33)

The method of claim 33, wherein the plurality of prioritized queues includes a third highest priority queue comprised of column write commands.

### Claim 35 (depends on 34)

The method of claim 34, wherein the plurality of prioritized queues include a fourth highest prioritized queue comprised of row write commands.

### Claim 36 (depends on 35)

The method of claim 35, further comprising selecting the read command by selecting the read command from one of the highest priority queue or the second highest priority queue.

### Claim 37 (depends on 31)

The method of claim 31, further comprising selecting a write command for isuance only if the write command is associated with the read command having a read-after-write dependence.

### Claim 38 (depends on 31)

The method of claim 31, further comprising selecting commands from the first number of write commands and the second number of write commands for issuance before the first number of write commands are blocked.

### Claim 39 (depends on 31)

The method of claim 31, further comprising selecting commands from the second number of write commands for issuance before the second number of write commands are blocked.

### Claim 40 (depends on 31)

The method of claim 31, further comprising selecting commands from a third number of write commands until the read command is selected for issuance.