# US 2019/0317153 A1 · Sampling circuit, equalization circuit, and system for single cell in series battery pack

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- Number: US 2019/0317153 A1
- Document ID: US20190317153A1
- Status: Published application
- Kind: A1
- Application number: 16/455,714
- Filed: 2019-06-27
- Published: 2019-10-17
- Earliest claimed: 2016-12-31
- Assignees: Huawei Technologies Co., Ltd.
- Applicants: Huawei Technologies Co., Ltd.
- Inventors: Denghai PAN; Zejie LV; Yuanzhong WU
- Web page: https://patentgrep.com/patent/US20190317153A1

## CPC

- G01R 31/3835: involving only voltage measurements
- G01R 31/3648: {comprising digital calculation means, e.g. for performing an algorithm}
- G01R 31/396: Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
- H02J 7/52: for charge balancing, e.g. equalisation of charge between batteries
- H02J 7/80: including monitoring or indicating arrangements
- B60L 58/22: Balancing the charge of battery modules
- H01M 10/482: {for several batteries or cells simultaneously or sequentially}
- H01M 2010/4271: {Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing}
- H02J 7/56: Active balancing, e.g. using capacitor-based, inductor-based or DC-DC converters
- Y02E 60/10: Energy storage using batteries
- Y02T 10/70: Energy storage systems for electromobility, e.g. batteries
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- H02J: ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- B60L: PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES (arrangements or mounting of electrical propulsion units or of plural diverse prime-movers for mutual or common propulsion in vehicles B60K1/00, B60K6/20; arrangements or mounting of electrical gearing in vehicles B60K17/12, B60K17/14; preventing wheel slip by reducing power in rail vehicles B61C15/08; dynamo-electric machines H02K; control or regulation of electric motors H02P); SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES (electric coupling devices combined with mechanical couplings of vehicles B60D1/64; electric heating for vehicles B60H1/00); ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL (control or regulation of electric motors H02P); MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
- H01M: PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02T: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION

## Abstract

A sampling circuit, an equalization circuit, and a system for a single cell in a series battery pack are provided. In the sampling circuit provided in this disclosure, the single cell is isolated from a voltage divider resistor in the bleeder circuit by using the first isolation sampling switch, so as to prevent a drain current of the single cell. In addition, sampling errors in sampling voltages collected by the sampling circuit may be offset during differential calculation.

## Claims

### Claim 1

A sampling circuit for a single cell in a series battery pack, comprising: a controller, an analog-to-digital converter (ADC), a bleeder circuit, a battery pack including n single cells connected in series, and n isolation sampling switches, wherein
one end of each of the n isolation sampling switches is connected to a first input end of the bleeder circuit, the other ends of the n isolation sampling switches are respectively connected to positive electrodes of the n single cells, and the isolation sampling switches are in a one-to-one correspondence with the single cells;
a negative electrode of a first single cell in the n single cells is connected to a second input end of the bleeder circuit, and is grounded;
an output end of the bleeder circuit is connected to a second input end of the ADC, a first input end of the ADC is grounded, and an output end of the ADC is connected to an input end of the controller;
a first output group of the controller is separately connected to control ends of the n isolation sampling switches to control the n isolation sampling switches to be open or closed; and
the controller sequentially controls the n isolation sampling switches to be closed, and sends voltages to earth of the positive electrodes of the n single cells corresponding to the n isolation sampling switches to the ADC for conversion after the voltages to earth are attenuated by the bleeder circuit, the ADC transmits converted sampling voltage values to the controller, and the controller subtracts two adjacent sampling voltage values to obtain a voltage value of a corresponding single cell.

### Claim 2 (depends on 1)

The sampling circuit according to claim 1, wherein the bleeder circuit comprises a first voltage divider resistor and a second voltage divider resistor;
one end of the first voltage divider resistor is connected to the n isolation sampling switches, and the other end is connected to the second input end of the ADC; and
one end of the second voltage divider resistor is connected to the negative electrode of the first single cell in the n single cells, and the other end is connected to the second input end of the ADC.

### Claim 3 (depends on 1)

The sampling circuit according to claim 1, further comprising an auxiliary driving power supply, wherein
any one of the n isolation sampling switches comprises a first transistor, a second transistor, and an opto-isolator;
a first port of the first transistor is connected to a first port of the second transistor, a second port of the first transistor is connected to a first port of the opto-isolator, and a third port of the first transistor is connected to a positive electrode of a single cell corresponding to the first transistor;
a second port of the second transistor is connected to the first port of the opto-isolator, and a third port of the second transistor is connected to the first input end of the bleeder circuit;
a second port of the opto-isolator and the controller are common-grounded, a third port of the opto-isolator is connected to the first output group of the controller, and a fourth port of the opto-isolator is connected to a positive electrode of the auxiliary driving power supply; and
a negative electrode of the auxiliary driving power supply is connected to the first input end of the bleeder circuit.

### Claim 4 (depends on 3)

The sampling circuit according to claim 3, wherein the first transistor and the second transistor are N-channel metal oxide semiconductors.

### Claim 5 (depends on 1)

The sampling circuit according to claim 1, wherein any one of the n isolation sampling switches comprises a third transistor, a fourth transistor, and an opto-isolator;
a first port of the third transistor is connected to a first port of the fourth transistor, a second port of the third transistor is connected to a fourth port of the opto-isolator, and a third port of the third transistor is connected to a positive electrode of a single cell corresponding to the third transistor;
a second port of the fourth transistor is connected to the fourth port of the opto-isolator, and a third port of the fourth transistor is connected to the first input end of the bleeder circuit; and
a first port of the opto-isolator is connected to a negative electrode of a single cell corresponding to the opto-isolator, a second port of the opto-isolator and the controller are common-grounded, and a third port of the opto-isolator is connected to the first output group of the controller.

### Claim 6 (depends on 5)

The sampling circuit according to claim 5, wherein the third transistor and the fourth transistor are P-channel metal oxide semiconductors.

### Claim 7

A sampling circuit for a single cell in a series battery pack, comprising: a controller, an analog-to-digital converter (ADC) with communication isolation, a battery pack including n single cells connected in series, n first isolation sampling switches, and n second isolation sampling switches, wherein
one end of each of the n first isolation sampling switches is connected to a first input end of the ADC with communication isolation, the other ends of the n first isolation sampling switches are respectively connected to positive electrodes of the n single cells, and the first isolation sampling switches are in a one-to-one correspondence with the single cells;
one end of each of the n second isolation sampling switches is connected to a second input end of the ADC with communication isolation, the other ends of the n second isolation sampling switches are respectively connected to negative electrodes of the n single cells, and the second isolation sampling switches are in a one-to-one correspondence with the single cells;
an output end of the ADC with communication isolation is connected to an input end of the controller;
a first output group of the controller is separately connected to control ends of the n first isolation sampling switches and control ends of the n second isolation sampling switches to control the n isolation sampling switches to be open or closed; and
the controller sequentially controls closure of the first isolation sampling switches and the second isolation sampling switches that are connected to all the single cells, and may sequentially send voltages of all the single cells to the ADC with communication isolation for conversion, and sampling voltage values of all the single cells that are converted by the ADC are isolated and transmitted to the controller.

### Claim 8 (depends on 7)

The sampling circuit according to claim 7, further comprising an auxiliary driving power supply, wherein
any one of the n first isolation sampling switches and the n second isolation sampling switches comprises a first transistor, a second transistor, and an opto-isolator;
a first port of the first transistor is connected to a first port of the second transistor, a second port of the first transistor is connected to a first port of the opto-isolator, and a third port of the first transistor is connected to a positive electrode of a single cell corresponding to the first transistor;
a second port of the second transistor is connected to the first port of the opto-isolator, and a third port of the second transistor is connected to a first input end of a bleeder circuit;
a second port of the opto-isolator and the controller are common-grounded, a third port of the opto-isolator is connected to the first output group of the controller, and a fourth port of the opto-isolator is connected to a positive electrode of the auxiliary driving power supply; and
a negative electrode of the auxiliary driving power supply is connected to the second input end of the ADC.

### Claim 9 (depends on 8)

The sampling circuit according to claim 8, wherein the first transistor and the second transistor are N-channel metal oxide semiconductors.

### Claim 10 (depends on 7)

The sampling circuit according to claim 7, wherein any one of the n first isolation sampling switches and the n second isolation sampling switches comprises a third transistor, a fourth transistor, and an opto-isolator;
a first port of the third transistor is connected to a first port of the fourth transistor, a second port of the third transistor is connected to a fourth port of the opto-isolator, and a third port of the third transistor is connected to a positive electrode of a single cell corresponding to the third transistor;
a second port of the fourth transistor is connected to the fourth port of the opto-isolator, and a third port of the fourth transistor is connected to a first input end of a bleeder circuit; and
a first port of the opto-isolator is connected to a negative electrode of a single cell corresponding to the opto-isolator, a second port of the opto-isolator and the controller are common-grounded, and a third port of the opto-isolator is connected to the first output group of the controller.

### Claim 11 (depends on 10)

The sampling circuit according to claim 10, wherein the third transistor and the fourth transistor are P-channel metal oxide semiconductors.

### Claim 12 (depends on 1)

An equalization circuit for a single cell in a series battery pack, applied to the sampling circuit according to claim 1, comprising: a controller, a battery pack including n single cells connected in series, n equalization switches, and n equalization resistors, wherein
any one of the n single cells is connected in series to one equalization switch and one equalization resistor;
a second output group of the controller is separately connected to control ends of the n equalization switches to control the n equalization switches to be open or closed; and
the controller controls, based on a sampling voltage value of each single cell that is collected by the sampling circuit and a preset battery equalization algorithm, connection of an equalization switch of a single cell that needs to be equalized, so that electric energy of the single cell that needs to be equalized is released by using the equalization resistor.

### Claim 13 (depends on 12)

The equalization circuit according to claim 12, wherein any one of the n equalization switches comprises a fifth transistor, a second opto-isolator, and a first resistor;
a first port of the fifth transistor is connected to a first port of the second opto-isolator by using the first resistor, a second port of the fifth transistor is connected to the first port of the second opto-isolator, and a third port of the fifth transistor is connected to a fourth port of the second opto-isolator by using the equalization resistor; and
the first port of the second opto-isolator is connected to a negative electrode of a single cell corresponding to the second opto-isolator, a second port of the second opto-isolator is grounded, a third port of the second opto-isolator is connected to the second output group of the controller, and the fourth port of the second opto-isolator is connected to a positive electrode of the single cell corresponding to the second opto-isolator.

### Claim 14 (depends on 13)

The equalization circuit according to claim 13, wherein the fifth transistor is an N-channel metal oxide semiconductor.

### Claim 15 (depends on 12)

The equalization circuit according to claim 12, wherein any one of the n equalization switches comprises a sixth transistor, a second opto-isolator, and a second resistor;
a first port of the sixth transistor is connected to a first port of the second opto-isolator by using the second resistor, a second port of the sixth transistor is connected to the first port of the second opto-isolator, and a third port of the sixth transistor is connected to a fourth port of the second opto-isolator by using the equalization resistor; and
the first port of the second opto-isolator is connected to a positive electrode of a single cell corresponding to the second opto-isolator, a second port of the second opto-isolator is grounded, a third port of the second opto-isolator is connected to the second output group of the controller, and the fourth port of the second opto-isolator is connected to a negative electrode of the single cell corresponding to the second opto-isolator.

### Claim 16 (depends on 15)

The equalization circuit according to claim 15, wherein the sixth transistor is a P-channel metal oxide semiconductor.